Yuanzhe Wang

MFTI: matrix-format tangential interpolation for modeling multi-port systems

Numerous algorithms to macromodel a linear time-invariant (LTI) system from its frequency-domain sampling data have been proposed in recent years [1,2,3,4,5,6,7,8], among which Loewner matrix-based tangential interpolation proves to be especially suitable for modeling massive-port systems [6, 7,8]. However, the existing Loewner matrix-based method follows vector-format tangential interpolation (VFTI), which fails to explore all the information contained in the frequency samples. In this paper, a novel matrix-format tangential interpolation (MFTI) is proposed, which requires much fewer samples to recover the system and yields better accuracy when handling under-sampled, noisy and/or ill-conditioned data. A recursive version of MFTI is proposed to further reduce the computational complexity. Numerical examples then confirm the superiority of MFTI over VFTI.

A Realistic Early-Stage Power Grid Verification Algorithm Based on Hierarchical Constraints

Power grid verification has become an indispensable step to guarantee a functional and robust chip design. Vectorless power grid verification methods, by solving linear programming (LP) problems under current constraints, enable worst-case voltage drop predictions at an early stage of design when the specific waveforms of current drains are unknown. In this paper, a novel power grid verification algorithm based on hierarchical constraints is proposed. By introducing novel power constraints, the proposed algorithm generates more realistic current patterns and provides less pessimistic voltage drop predictions. The model order reduction-based coefficient computation algorithm reduces the complexity of formulating the LP problems from being proportional to steps to being independent of steps. Utilizing the special hierarchical constraint structure, the submodular polyhedron greedy algorithm dramatically reduces the complexity of solving the LP problems from over O(km3) to roughly O(kmlogkm), where km is the number of variables. Numerical results have shown that the proposed algorithm provides less pessimistic voltage drop prediction while at the same time achieves dramatic speedup.

Passivity Enforcement for Descriptor Systems Via Matrix Pencil Perturbation

Passivity is an important property of circuits and systems to guarantee stable global simulation. Nonetheless, nonpassive models may result from passive underlying structures due to numerical or measurement error/inaccuracy. A postprocessing passivity enforcement algorithm is therefore desirable to perturb the model to be passive under a controlled error. However, previous literature only reports such passivity enforcement algorithms for pole-residue models and regular systems (RSs). In this paper, passivity enforcement algorithms for descriptor systems (DSs, a superset of RSs) with possibly singular direct term (specifically, D+DT or I-DDT) are proposed. The proposed algorithms cover all kinds of state-space models (RSs or DSs, with direct terms being singular or nonsingular, in the immittance or scattering representation) and thus have a much wider application scope than existing algorithms. The passivity enforcement is reduced to two standard optimization problems that can be solved efficiently. The objective functions in both optimization problems are the error functions, hence perturbed models with adequate accuracy can be obtained. Numerical examples then verify the efficiency and robustness of the proposed algorithms.

More realistic power grid verification based on hierarchical current and power constraints

Vectorless power grid verification algorithms, by solving linear programming (LP) problems under current constraints, enable worst-case voltage drop predictions at an early design stage. However, worst-case current patterns obtained by many existing vectorless algorithms are time-invariant (i.e., are constant throughout the simulation time), which may result in an overly pessimistic voltage drop prediction. In this paper, a more realistic power grid verification algorithm based on hierarchical current and power constraints is proposed. The proposed algorithm naturally handles general RCL power grid models. Currents at different time steps are treated as independent variables and additional power constraints are introduced; this results in more realistic time-varying worst-case current patterns and less pessimistic worst-case voltage drop predictions. Moreover, a sorting-deletion algorithm is proposed to speed up solving LP problems by utilizing the hierarchical constraint structure. Experimental results confirm that worst-case current patterns and voltage drops obtained by the proposed algorithm are more realistic, and that the sorting-deletion algorithm reduces runtime needed to solve LP problems by 85%.

Model Order Reduction for Neutral Systems by Moment Matching

Circuits with delay elements are very popular and important in the simulation of very-large-scale integration (VLSI) systems. Neutral systems (NSs) with multiple constant delays (MCDs), for example, can be used to model the partial element equivalent circuits (PEECs), which are widely used in high-frequency electromagnetic (EM) analysis. In this paper, the model order reduction (MOR) problem for the NS with MCDs is addressed by moment matching method. The nonlinear exponential terms coming from the delayed states and the derivative of the delayed states in the transfer function of the original NS are first approximated by a Padé approximation or a Taylor series expansion. This has the consequence that the transfer function of the original NS is exponential-free and the standard moment matching method for reduction is readily applied. The Padé approximation of exponential terms gives an expanded delay-free system, which is further reduced to a delay-free reduced-order model (ROM). A Taylor series expansion of exponential terms lets the inverse in the original transfer function have only powers-of-s terms, whose coefficient matrices are of the same size as the original NS, which results in a ROM modeled by a lower-order NS. Numerical examples are included to show the effectiveness of the proposed algorithms and the comparison with existing MOR methods, such as the linear matrix inequality (LMI)-based method.

A Decade of Vector Fitting Development: Applications on Signal/Power Integrity

Vector Fitting (VF) has been introduced as a partial‐fraction basis response fitting methodology for over a decade. Because of its reliability and versatility, VF has been applied and extended to a number of areas. In this book chapter, we will discuss the applications of VF in the context of macromodeling of linear structures in signal/power integrity analyses. We will also discuss main features of VF along three directions: data, algorithms and models. Two practical examples are given to demonstrate the merits of VF. An alternative P‐norm approximation criterion is proposed to enhance the accuracy of the macromodeling process.

Frequency-domain transient analysis of multitime partial differential equation systems

Multitime partial differential equations (MPDEs) provide an efficient method to simulate circuits with widely separated rates of inputs. This paper proposes a fast and accurate frequency-domain multitime transient analysis method for MPDE systems, which fills in the gap for the lack of general frequency-domain solver for MPDE systems. A block-pulse function-based multidimensional inverse Laplace transform strategy is adopted. The method can be applied to discrete input systems. Numerical examples then confirm its superior accuracy, under similar efficiency, over time-domain solvers.

Efficient Transient Analysis of Power Delivery Network With Clock/Power Gating by Sparse Approximation

Transient analysis of large-scale power delivery network (PDN) is a critical task to ensure the functional correctness and desired performance of todays integrated circuits (ICs), especially if significant transient noises are induced by clock and/or power gating due to the utilization of extensive power management. In this paper, we propose an efficient algorithm for PDN transient analysis based on sparse approximation. The key idea is to exploit the fact that the transient response caused by clock/power gating is often localized and the voltages at many other “inactive” nodes are almost unchanged, thereby rendering a unique sparse structure. By taking advantage of the underlying sparsity of the solution structure, a modified conjugate gradient algorithm is developed and tuned to efficiently solve the PDN analysis problem with low computational cost. Our numerical experiments based on standard benchmarks demonstrate that the proposed transient analysis with sparse approximation offers up to 2.2× runtime speedup over other traditional methods, while simultaneously achieving similar accuracy.

Weakly nonlinear circuit analysis based on fast multidimensional inverse Laplace transform

There have been continuing thrusts in developing efficient modeling techniques for circuit simulation. However, most circuit simulation methods are time-domain solvers. In this paper we propose a frequency-domain simulation method based on Laguerre function expansion. The proposed method handles both linear and nonlinear circuits. The Laguerre method can invert multidimensional Laplace transform efficiently with a high accuracy, which is a key step of the proposed method. Besides, an adaptive mesh refinement (AMR) technique is developed and its parallel implementation is introduced to speed up the computation. Numerical examples show that our proposed method can accurately simulate large circuits while enjoying low computation complexity.

Corrigendum to “A Realistic Early-Stage Power Grid Verification Algorithm Based on Hierarchical Constraints” [Jan 12 109-120]

The authors for the above titled paper were incorrectly listed. The correct list of authors is presented here.