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Featured researches published by Yuichiro Inatomi.


Proceedings of SPIE | 2008

LWR reduction in low-k1 ArF-immersion lithography

Kentaro Matsunaga; Tomoya Oori; Hirokazu Kato; Daisuke Kawamura; Eishi Shiobara; Yuichiro Inatomi; Tetsu Kawasaki; Mitsuaki Iwashita; Shinichi Ito

Line width roughness (LWR) reduction is a critical issue for low k1 ArF immersion lithography. Various approaches such as materials, exposure technology and the track process have been performed for LWR reduction during lithography process. It was reported that the post-development bake process had good performance for LWR reduction (1). However, the post-development bake process induced large CD change owing to the degradation of large isolated resist pattern. Therefore post-development process with small iso-dense bias is required in low k1 ArF immersion lithography. The resist smoothing process is one of the candidates for LWR reduction with small iso-dense bias. This method whereby the resist pattern surface is partially melted in organic-solvent atmosphere was shown to have a significant LWR reduction effect on resist patterns. This paper reports on the application of the resist smoothing process to the ArF immersion resist pattern after development. It was found that the resist smoothing process was effective to reduce LWR for ArF immersion resist. As a result of LWR trace from after development to after the hard mask etching process, the effect of LWR reduction with the resist smoothing process continued after the hard mask etching process. Furthermore CD change of large isolated patterns with the smoothing process was smaller than in the case of post-development bake process. We confirmed that the resist smoothing process is an effective method for decreasing LWR in ArF immersion lithography.


Proceedings of SPIE, the International Society for Optical Engineering | 2006

LWR reduction in ArF resist pattern by resist smoothing process

Yuichiro Inatomi; Tetsu Kawasaki; Mitsuaki Iwashita

With the scaling down of the semiconductor design rule, the requirement to reduce the roughness of the resist pattern used in lithography processing has become crucial. Two typical examples of resist-pattern roughness are line-edge roughness (LER) and line-width roughness (LWR). In particular, as the wavelength of the optical light source has been shortened from 248 nm (KrF source) to 193 nm (ArF source), the problem that LWR is produced with a scaled-down ArF resist pattern has become a cause of deterioration in device characteristics. And with further scaling down in the future, decreasing this LWR on the resist pattern will become a major challenge facing lithography processing. Accordingly, to meet this challenge, it has thus become urgent to find a good method for reducing LWR. At present, for LWR reduction during lithography processing, various measures have been tried and many studies taking different approaches-addressing materials (resist, etc.), exposure technology (mask, etc.), and the track process-have been performed. A decisive method of reducing LWR, however, has not yet been found. Aiming at reducing LWR, we have thus developed a process for treating the post-development resist pattern in an organic-solvent atmosphere. This resist smoothing process is effective method for both Krf resist and Arf resist, moreover it was achieved that VUV pre-treatment improve solvent solubility against resist, especially Arf resist. As a result, the LWR of a resist pattern after undergoing this treatment process was substantially decreased. Moreover, as for the roughness produced during the following etching process for forming the gate electrode, it was confirmed that the effect of decreasing LWR of the resist pattern is carried forward to this next process. In this paper, the developed LWR-reduction method for an ArF ultra-fine pattern is explained, and LWR reduction results achieved with method are presented.


Archive | 2010

Substrate processing method, storage medium storing program for executing substrate processing method and substrate processing apparatus

Yuichiro Inatomi


Archive | 2004

Method for improving surface roughness of processed film of substrate and apparatus for processing substrate

Yuichiro Inatomi


Archive | 2013

RESIST COATING AND DEVELOPING APPARATUS, RESIST COATING AND DEVELOPING METHOD, RESIST-FILM PROCESSING APPARATUS, AND RESIST-FILM PROCESSING METHOD

Yuichiro Inatomi


Archive | 2013

SUBSTRATE PROCESSING METHOD AND SUBSTRATE PROCESSING SYSTEM

Yuichiro Inatomi


Archive | 2013

Plating method, plating system and storage medium

Nobutaka Mizutani; Takashi Tanaka; Yuichiro Inatomi; Yusuke Saito; Mitsuaki Iwashita


Archive | 2010

Resist applying and developing method, resist film processing unit, and resist applying and developing apparatus comprising the unit

Gousuke Shiraishi; Yuichiro Inatomi


Archive | 2012

PLATING APPARATUS, PLATING METHOD AND STORAGE MEDIUM

Yuichiro Inatomi; Takashi Tanaka; Mitsuaki Iwashita


Archive | 2011

RESIST COATING AND DEVELOPING APPARATUS AND METHOD

Yuichiro Inatomi

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