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Featured researches published by Yukihiro Doi.


global communications conference | 1994

A 160-Gb/s ATM switching system using an internal speed-up crossbar switch

Kouichi Genda; Yukihiro Doi; K. Endo; T. Kawamura; Shinichi Sasaki

A 160 Gb/s ATM switching system handling sixteen 10-Gb/s input lines is constructed by using an internal speed-up crossbar switch. The switch is structured around an input/output buffering switch architecture, high-speed bipolar devices and multichip module technology. The switch adopts a bufferless crossbar network realized with high-speed bipolar devices and cell buffers only on each input and output line. Using a separate architecture to link the bufferless routing network to the cell buffers, 20 Gb/s high-speed cell transmission can be easily realized in the crossbar network. In addition, a new high-speed arbitration algorithm using three bus lines on each output line, named the bi-directional arbiter, is adopted. The bi-directional arbiter is about 1.5 times faster than the conventional ring-arbiter and has the same fairness function. Using the switching system, a sub-tera-bit/s ATM switching system can be achieved in a significant step towards broadband ISDN.


IEICE Transactions on Communications | 1993

High-speed ATM switch with input and cross-point buffers

Yukihiro Doi; Naoaki Yamanaka


Electronics and Communications in Japan Part I-communications | 1997

A 160 GB/S ATM SWITCH USING INTERNAL SPEED-UP CROSSBAR SWITCH ARCHITECTURE

Kouichi Genda; Naoaki Yamanaka; Yukihiro Doi; K. Endo


1997 2nd IEEE International Workshop on Broadband Switching Systems Proceedings, IEEE BSS '97. Workshop Theme 'Switching Systems for the Broadband Internet and for QoS on Demand' (Cat. No.97TH8352) | 1997

Flexible ATM switching architecture for multimedia communications

Zenichi Yashiro; Toshiro Tanaka; Yukihiro Doi


Ntt Review | 1997

A very-high-speed ATM switch architecture using internal speed-up technique

Kouichi Genda; Yukihiro Doi; Ken ichi Endo; Naoaki Yamanaka


asia-pacific conference on communications | 1993

An Ultra-High-Speed ATM Switch Architecture using Data-Driven Self-Bit-Synchronization Technique Suitable for Photonic Switches

Kouichi Genda; Naoaki Yamanaka; Yukihiro Doi


IEICE Transactions on Communications | 1998

The Next-Generation ATM Switching Architecture for Multimedia Communications

Zenichi Yashiro; Toshiro Tanaka; Yukihiro Doi


Ntt Review | 1997

Very-high-speed ATM switching system technologies

Naoaki Yamanaka; Yukihiro Doi; Hideki Fukuda; Toyofumi Takenaka; Zen Ichi Yashiro


NTT R and D | 1996

High-speed ATM switching system technologies

Naoaki Yamanaka; Yukihiro Doi; Hideki Fukuda; Toyofumi Takenaka; Zenichi Yashiro


IEICE Transactions on Communications | 1993

A High-Speed ATM Switch that Uses a Simple Retry Algorithm and Small Input Buffers (Special Section of Letters Selected from the '92 Fall Conference and the '93 Spring Conference)

Kouichi Genda; Naoaki Yamanaka; Yukihiro Doi

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