Network


Latest external collaboration on country level. Dive into details by clicking on the dots.

Hotspot


Dive into the research topics where Yun Seok Choi is active.

Publication


Featured researches published by Yun Seok Choi.


IEEE Electron Device Letters | 2002

CMOS-compatible surface-micromachined suspended-spiral inductors for multi-GHz silicon RF ICs

Jun Bo Yoon; Yun Seok Choi; Byeong Il Kim; Yunseong Eo; Euisik Yoon

Fully CMOS-compatible, highly suspended spiral inductors have been designed and fabricated on standard silicon substrates (1/spl sim/30 /spl Omega//spl middot/cm in resistivity) by surface micromachining technology (no substrate etch involved). The RF characteristics of the fabricated inductors have been measured and their equivalent circuit parameters have been extracted using a conventional lumped-element model. We have achieved a high peak Q-factor of 70 at 6 GHz with inductance of 1.38 nH (at 1 GHz) and a self-resonant frequency of over 20 GHz. To the best of our knowledge, this is the highest Q-factor ever reported on standard silicon substrates. This work has demonstrated that the proposed microelectromechanical systems (MEMS) inductors can be a viable technology option to meet the todays strong demands on high-Q on-chip inductors for multi-GHz silicon RF ICs.


IEEE Transactions on Microwave Theory and Techniques | 2003

3-D construction of monolithic passive components for RF and microwave ICs using thick-metal surface micromachining technology

Jun Boo Yoon; Byeong Il Kim; Yun Seok Choi; Euisik Yoon

As a viable technological option to address todays strong demands for high-performance monolithic low-cost passive components in RF and microwave integrated circuits (ICs), a new CMOS-compatible versatile thick-metal surface micromachining technology has been developed. This technology enables to build arbitrary three-dimensional (3-D) metal microstructures on standard silicon substrate as post-IC processes at low temperature below 120/spl deg/C. Using this technology, various highly suspended 3-D microstructures have been successfully demonstrated for RF and microwave IC applications. We have demonstrated spiral inductors suspended 100 /spl mu/m over the substrate, coplanar waveguides suspended 50 /spl mu/m over the substrate, and complicated microcoaxial lines, which have 50-/spl mu/m-suspended center signal lines surrounded by inclined ground shields of 100 /spl mu/m in height. The microwave performance of the microcoaxial transmission line fabricated on a glass substrate has been evaluated to achieve very low attenuation of 0.03 dB/mm at 10 GHz with an effective dielectric constant of 1.6. The process variation/manufacturability, mechanical stability, and package issues also have been discussed in detail.


IEEE Transactions on Microwave Theory and Techniques | 2003

Fully integrated low phase-noise VCOs with on-chip MEMS inductors

Eun Chul Park; Yun Seok Choi; Jun Bo Yoon; Songcheol Hong; Euisik Yoon

We present fully integrated high-performance voltage-controlled oscillators (VCOs) with on-chip microelectromechanical system (MEMS) inductors for the first time. MEMS inductors have been realized from the unique CMOS-compatible MEMS process that we have developed to provide suspended thick metal structures for high-quality (Q) factors. Fully integrated CMOS VCOs have been fabricated by monolithically integrating these MEMS inductors on the top of the CMOS active circuits realized by the TSMC 0.18-/spl mu/m mixed-mode CMOS process. Low phase noise has been achieved as -124 and -117 dBc/Hz at 300-kHz offset from carrier frequencies of 1 and 2.6 GHz, respectively, in the fabricated single-chip VCOs.


international conference on micro electro mechanical systems | 2002

3-D lithography and metal surface micromachining for RF and microwave MEMS

Jun Bo Yoon; Byeong Il Kim; Yun Seok Choi; Euisik Yoon

A new metal surface micromachining technology utilizing 3-D lithography, electroplating, and mechanical polishing has been developed to fabricate arbitrary 3-D metal microstructures as post-IC processes at low temperature below 120/spl deg/C. Using this technology, various highly-suspended 3-D microstructures have been successfully demonstrated for RF and microwave MEMS applications. We have fabricated spiral inductors suspended 100 /spl mu/m over the substrate, coplanar waveguides suspended 50 /spl mu/m over the substrate, and complicated micro-coaxial lines which have 50 /spl mu/m-suspended center signal lines surrounded by ground shields of 100 /spl mu/m in height.


Small | 2014

Ultra-specific zeptomole microRNA detection by plasmonic nanowire interstice sensor with Bi-temperature hybridization.

Taejoon Kang; Hongki Kim; Jeong Min Lee; Hyoban Lee; Yun Seok Choi; Gyeongwon Kang; Min-Kyo Seo; Bong Hyun Chung; Yongwon Jung; Bongsoo Kim

MicroRNAs (miRNAs) are emerging new biomarkers for many human diseases. To fully employ miRNAs as biomarkers for clinical diagnosis, it is most desirable to accurately determine the expression patterns of miRNAs. The optimum miRNA profiling method would feature 1) highest sensitivity with a wide dynamic range for accurate expression patterns, 2) supreme specificity to discriminate single nucleotide polymorphisms (SNPs), and 3) simple sensing processes to minimize measurement variation. Here, an ultra-specific detection method of miRNAs with zeptomole sensitivity is reported by applying bi-temperature hybridizations on single-crystalline plasmonic nanowire interstice (PNI) sensors. This method shows near-perfect accuracy of SNPs and a very low detection limit of 100 am (50 zeptomole) without any amplification or labeling steps. Furthermore, multiplex sensing capability and wide dynamic ranges (100 am-100 pm) of this method allows reliable observation of the expression patterns of miRNAs extracted from human tissues. The PNI sensor offers combination of ultra-specificity and zeptomole sensitivity while requiring two steps of hybridization between short oligonucleotides, which could present the best set of features for optimum miRNA sensing method.


international symposium on circuits and systems | 2003

A hardware-like high-level language based environment for 3D graphics architecture exploration

Inho Lee; Joung-Youn Kim; Yeon-Ho Im; Yun Seok Choi; Hyun-Chul Shin; Chang-Young Han; Dong-Hyun Kim; Hyoung-Joon Park; Young-Il Seo; Kyusik Chung; Chang-Hyo Yu; Kanghyup Chun; Lee-Sup Kim

The high complexity and the short lifetime of 3D graphics acceleration hardware increase the necessity of an environment for hardware development. For easy modification and fast testing of architecture, a high-level language based environment is desirable. Therefore, in this paper we propose a Graphics Architecture Testing Environment (GATE) that is based on Microsoft Visual C++. GATE models overall graphics hardware architecture through a modular approach, supports OpenGL, and offers easy modification and rapid testing of architecture. It also gathers computational statistics. A layered approach and Hardware Description Macro (HDM) support hardware modeling and architecture modification. Pre-defined types and operations provide statistical information. Several case studies of 3D graphics architecture on GATE show the capability of our environment.


international microwave symposium | 2003

Encapsulation of the micromachined air-suspended inductors

Yun Seok Choi; Euisik Yoon; Jun Bo Yoon

We have proposed and investigated encapsulation of air-suspended microstructures, especially for micromachined inductors in silicon radio frequency integrated circuits (RF ICs), providing a practical solution for covering up structural weakness to shock/vibration and accommodating package processes. As an encapsulating agent, two materials have been studied; polydimethylsiloxane (PDMS) for examining possible structural deformation when spin-coated, and benzocyclobutene (BCB) for measuring possible electrical performance degradation due to the finite dielectric constant. According to the experiments, no structural deformation has been observed after PDMS is spin-coated. After encapsulated by BCB, the maximum 20% degradation of integrated inductor Q-factor has been observed.


international conference on micro electro mechanical systems | 2002

A high-performance MEMS transformer for silicon RF ICS

Yun Seok Choi; Jun Bo Yoon; Byeong Il Kim; Euisik Yoon

A new spiral-type suspended transformer for silicon radio frequency integrated circuits (RF ICs) has been fabricated by surface micromachining technology The fabricated transformer on standard silicon substrate has shown a low insertion loss of 1.9 dB at 1 GHz by reducing substrate coupling and ohmic loss using the proposed MEMS technology. Equivalent circuit models for the spiral-type suspended transformer have been extracted and shown that they agree well with measured characteristics.


11th International Conference on Solid-State Sensors and Actuators (Transducers'01) | 2001

Fabrication of a Solenoid-Type Microwave Transformer

Yun Seok Choi; Jun-Bo Yoon; Byung-Il Kim; Euisik Yoon; Chul-Hi Han

A solenoid-type microwave transformer has been fabricated on a glass wafer by the sacrificial metallic mold (SMM) method. The microwave characteristic of the fabricated 1:1 transformer has been measured in the frequency range of 0.5 to 18GHz, which shows the minimum insertion loss of about 0.5dB and the wide bandwidth of a few GHz. Also, it shows that the minimum insertion loss and the pass-band frequency depend mostly on the total length of the transformer.


IEEE Electron Device Letters | 2004

Experimental analysis of the effect of metal thickness on the quality factor in integrated spiral inductors for RF ICs

Yun Seok Choi; Jun-Bo Yoon

Collaboration


Dive into the Yun Seok Choi's collaboration.

Top Co-Authors

Avatar

Euisik Yoon

University of Michigan

View shared research outputs
Top Co-Authors

Avatar
Top Co-Authors

Avatar

Bong Hyun Chung

Korea Research Institute of Bioscience and Biotechnology

View shared research outputs
Researchain Logo
Decentralizing Knowledge