Yung-Sheng Liu
General Electric
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Publication
Featured researches published by Yung-Sheng Liu.
Proceedings of the IEEE | 2000
Ray T. Chen; Lei Lin; Chulchae Choi; Yazhao Liu; Bipin Bihari; Linghui Wu; Suning Tang; Randy W. Wickman; B. Picor; M.K. Hibb-Brenner; J. Bristow; Yung-Sheng Liu
A fully embedded board-level guided-wave optical interconnection is presented to solve the packaging compatibility problem. All elements involved in providing high-speed optical communications within one board are demonstrated. Experimental results on a 12-channel linear array of thin-film polyimide waveguides, vertical-cavity surface-emitting lasers (VCSELs) (42 /spl mu/m), and silicon MSM photodetectors (10 /spl mu/m) suitable for a fully embedded implementation are provided. Two types of waveguide couplers, titled gratings and 45/spl deg/ total internal reflection mirrors, are fabricated within the polyimide waveguides. Thirty-five to near 100% coupling efficiencies are experimentally confirmed. By doing so, all the real estate of the PC board surface are occupied by electronics, and therefore one only observes the performance enhancement due to the employment of optical interconnection but does not worry about the interface problem between electronic and optoelectronic components unlike conventional approaches. A high speed 1-48 optical clock signal distribution network for Cray T-90 super computer is demonstrated. A waveguide propagation loss of 0.21 dB/cm at 850 nm was experimentally confirmed for the 1-48 clock signal distribution and for point-to-point interconnects. The feasibility of using polyimide as the interlayer dielectric material to form hybrid three-dimensional interconnects is also demonstrated. Finally, a waveguide bus architecture is presented, which provides a realistic bidirectional broadcasting transmission of optical signals. Such a structure is equivalent to such IEEE standard bus protocols as VME bus and FutureBus.
Proc. SPIE, Society of Photo-optical Instrumentation Engineers | 1995
Julian P. G. Bristow; Yue Liu; Terry Marta; Sommy Bounnak; Klein Johnson; Yung-Sheng Liu; Herbert S. Cole
Optical backplanes are of increasing interest for commercial and military avionic processors, and for commercial supercomputers. Projected interconnection density limits of electrical interconnects are rapidly becoming a bottleneck, preventing optimal exploitation of electronic processor capability. A potential obstacle to the commercial development of optoelectronic interconnect components for backplane-based systems is the small market for such specialized technology. In order to ensure that a cost effective solution is available for backplane based systems, commonality with a higher volume application is required. We describe optical packaging techniques for board level waveguides and multichip modules which exploit materials, processes and equipment already in widespread use in the electronics industry, and which can also be applied to a wide range of optoelectronic modules for local area network and telecommunications applications. Rugged polyetherimide waveguides with losses of 0.24 dB/cm have been integrated with conventional circuit board materials, and optoelectronic die have been packaged in a multichip module process using equipment normally used for purely electronic packaging. Practical optical interfaces and connectors have been demonstrated for board-to-backplane and board-to-multichip module applications, and offer increased pincount over their electrical counterparts while retaining compatibility with existing electrical connector alignment and fabrication tolerances.
Proc. SPIE, Society of Photo-optical Instrumentation Engineers | 1994
Yung-Sheng Liu; Herbert S. Cole; Julian P. G. Bristow; Yue Liu
In this paper, we describe a novel approach for fabrication of low-cost optoelectronic modules for optical interconnect applications. The concept includes: (1) placement of optical and electrical components on a common substrate using a chip-first MCM structure to improve thermal handling capabilities, (2) fabrication of both optical and electrical interconnects using planar processes compatible to standard IC processes in manufacturing to reduce nonrecurring engineering costs, and (3) application of adaptive interconnect for device-to-waveguide alignment to reduce recurring packaging costs. Preliminary results on waveguide fabrication and modeling of adaptive interconnect are discussed in this paper.
Optoelectronic interconnects and packaging. Conference | 1997
Yung-Sheng Liu; W. B. Hennessy; R. J. Wojnarowski; Julian P. G. Bristow; Yue Liu; John R. Rowlette; Jared D. Stack; James T. Yardley; Louay Eldada; Richard M. Osgood; R. Scarmozzino; Shin H. Lee; Susant K. Patra
This paper describes the technical approach and progresses of the POINT program. This project is a collaborative effort among GE, Honeywell, AMP, AlliedSignal, Columbia University and University of California at San Diego, sponsored by DARPA/ETO to develop affordable optoelectronic packaging and interconnect technologies for board and backplane applications. In this paper, we report the development of a backplane interconnect structure using polymer waveguides to an interconnect length of 280 mm to demonstrate high density and high speed interconnect, and the related technical development efforts on: (a) a high density and high speed VCSEL array packaging technology that employs planar fabrication and batch processing for low-cost manufacturing, (b) passive alignment techniques for reducing recurrent cost in optoelectronic assembly, (c) low-cost optical polymers for board and backplane level interconnects, and (d) CAD tools for modeling multimode guided wave systems and assisting optoelectronic packaging mechanical design.
Proceedings of Massively Parallel Processing Using Optical Interconnections | 1996
Chunhe Zhao; Jian Liu; Ray T. Chen; Yung-Sheng Liu
The architecture of a hybrid electrical and optical backplane with multiple bus lines for high performance bus is proposed and bus systems with 2-bus lines at a wavelength of 850 nm are experimentally demonstrated, with a size of collimation lens (here we used graded index (GRIN) lenses) and level of collimation-limited separation of 1.5 mm between the two bus lines. For the new bus system containing multiple bus lines and 9 processor/memory boards, VCSELs (vertical cavity surface emitting lasers) and photodetector arrays, such parameters as power budget, misalignment and packaging related issues are discussed. With the introduction of GRIN lenses into the backplane system, it is found that not only can the signal beam from the VCSELs get collimated, but the angular tolerance of the system is greatly enhanced. The optical backplane bus system developed here is transparent to higher level bus protocols, thus can support standard backplane buses such as Futurebus/sup +/, Multi-bus II, and VMEbus.
Optoelectronics '99 - Integrated Optoelectronic Devices | 1999
Ray T. Chen; Linghui Wu; Lei Lin; Chulchae Choi; Yujie Liu; Bipin Bihari; Suning Tang; Randy W. Wickman; Bruce R. Pecor; Yung-Sheng Liu
We report the formation of polyimide-based H-tree waveguides for a multi-GBit/sec optical clock signal distribution in a Si CMOS process compatible environment. Such a clock distribution system is to replace the existing electronic counterpart associated with high-speed supercomputers such as Cray T-90 machine. A waveguide propagation loss of 0.21 dB/cm at 850 nm was experimentally confirmed for the 1-to-48 waveguide fanout device. The planarization requirement of the optical interconnection layer among many electrical interconnection layers makes the employment of tilted grating a choice of desire. Theoretical calculation predicts the 1-to-1 free-space to waveguide coupling with an efficiency as high as 95 percent. Currently, a coupling efficiency of 35 percent was experimentally confirmed due to the limited index difference between guiding and cladding layers. Further experiments aimed at structuring a larger guiding/cladding layer index differences are under investigation. To effectively couple an optical signal into the waveguide through the tilted grating coupler, the accuracy of the wavelength employed is pivotal. This makes the usage of the vertical cavity surface-emitting lasers (VCSELs) and VCSEL arrays the best choice when compared with edge-emitting lasers. Modulation bandwidth as high as 6 GHz was demonstrated at 850 nm. Such a wavelength is compatible with Si-based photodetectors.
Optoelectronic interconnects and packaging. Conference | 1997
R. Scarmozzino; Richard M. Osgood; Louay Eldada; James T. Yardley; Yue Liu; Julian P. G. Bristow; Jared D. Stack; John R. Rowlette; Yung-Sheng Liu
The development of multimode passive polymer optical waveguide components for board and backplane interconnect applications, such as in the DARPA-sponsored, polymer optical interconnect technology (POINT) program, require several optics design issues to be addressed including efficiency and modal noise. For example, the mating of arrays of sources, detectors, and fibers requires appropriate fanout structures to match the component pitch. Here we consider designs for such structures employing multimode polymer waveguides, including both abrupt and smooth bending elements. We investigate these structures using a new multimode BPM simulation CAD tool, and consider the bend losses as a function of geometry, angle, and source condition. The results are compared with experimental observations on devices fabricated for use in the POINT demonstration module. The simulation closely matches the experiment, demonstrating the utility of such efforts in practical component development.
Sol-Gel and Polymer Photonic Devices: A Critical Review | 1997
Ray T. Chen; Linghui Wu; Feiming Li; Suning Tang; Michael Dubinovsky; J. M. Qi; Clint L. Schow; Joe C. Campbell; Randy W. Wickman; Bruce R. Pecor; Mary K. Hibbs-Brenner; Julian P. G. Bristow; Yung-Sheng Liu; Scott Rattan; Chad Noddings
We present the fabrication of polyimide-based H-tree waveguides for a multi-GBit/sec optical clock signal distribution in a Si CMOS process compatible environment. Such a clock distribution system is to replace the existing electronic counterpart associated with high-performance computers. A waveguide propagation loss of 0.21 dB/cm at 850 nm was experimentally confirmed for the l-to-48 waveguide fanout device, l-to-2 splitting loss and bending loss were measured to be 0.25 dB and higher. The planarization requirement of the optical interconnection layer among many electrical interconnection layers makes the employment of tilted grating a choice of desire. Theoretical calculation predicts the 1-to-l free-space to waveguide coupling with an efficiency as high as 95%. Currently, a coupling efficiency of 35% was experimentally confirmed due to the limited index difference between guiding and cladding layers. Further experiments aimed at structuring a larger guiding/cladding layer index differences are under investigation. To effectively couple an optical signal into the waveguide through the tided grating coupler, the accuracy of the wavelength employed is pivotal. This makes the usage of the vertical cavity surface-emitting lasers (VCSELs) and VCSEL arrays the best choice when compared with edge-emitting lasers. Modulation bandwidth as high as 6 GBit/sec was demonstrated at 850 nm. Such a wavelength is compatible with Si-based photodetectors. Temperature dependence of the threshold current up to 155 °C was measured which will determine the power dissipation issue of the optoelectronic packaging. Finally, the first fully monolithic Si-MOSFET integrated receiver was made as the optical clock signal detector. To further enhance the bandwidth of such a detector, a resonant cavity structure with Si/Si02 as the bottom mirror was employed. The measured demodulation bandwidth is over 10 GHz. A fully integrated guided-wave optical clock signal distribution system having planarized grating couplers, H-tree Si- CMOS process compatible waveguides, VCSELs and Si-based photo-receivers will be demonstrated in the near future.
Proceedings of SPIE - The International Society for Optical Engineering | 1998
Hongfa Luan; Linghui Wu; Bipin Bihari; Jianhua Gan; Ray T. Chen; Suning Tang; Randy W. Wickman; Bruce R. Pecor; Yung-Sheng Liu
We report the formation of polyimide-based H-tree waveguides for a multi-GBit/sec optical clock signal distribution in a Si CMOS process compatible environment. Such a clock distribution system is to replace the existing electronic counterpart associated with high-speed supercomputers such as Cray T-90 machine. A waveguide propagation loss of 0.21 dB/cm at 850 nm was experimentally confirmed for the 1-to-48 waveguide fanout device. The planarization requirement of the optical interconnection layer among many electrical interconnection layers makes the employment of tilted grating a choice of desire. Theoretical calculation predicts the 1-to-1 free-space to waveguide coupling with an efficiency as high as 95 percent. Currently, a coupling efficiency of 35 percent was experimentally confirmed due to the limited index difference between guiding and cladding layers. Further experiments aimed at structuring a larger guiding/cladding layer index differences are under investigation. To effectively couple an optical signal into the waveguide through the tilted grating coupler, the accuracy of the wavelength employed is pivotal. This makes the usage of the vertical cavity surface-emitting lasers (VCSELs) and VCSEL arrays the best choice when compared with edge-emitting lasers. Modulation bandwidth as high as 6 GHz was demonstrated at 850 nm. Such a wavelength is compatible with Si-based photodetectors.
Optoelectronic Interconnects and Packaging: A Critical Review | 1996
Yung-Sheng Liu; R. J. Wojnarowski; W. B. Hennessy; Julian P. G. Bristow; Yue Liu; Andrzej Peczalski; John R. Rowlette; Alan Plotts; Jared D. Stack; James T. Yardley; Louay Eldada; Richard M. Osgood; R. Scarmozzino; Sing H. Lee; Volkan H. Ozguz
The Polymer Optical Interconnect Technology (POINT) represents a major collaborative effort among GE, Honeywell, AMP, AlliedSignal, Columbia University and the University of California at San Diego (UCSD), sponsored by ARPA, in developing affordable optoelectronic module packaging and interconnect technologies for board- and backplane- level optical interconnect applications for a wide range of military and commercial applications. The POINT program takes a novel development approach by fully leveraging the existing electronic design, processing, fabrication and module packaging technologies to optoelectronic module packaging. The POINT program further incorporates several state-of-the-art optoelectronic technologies that include high-speed VCSEL for multichannel array data TM transmission; flexible optical polymers such as Polyguide or coupling of device-to-fiber using a passively alignment process; a low-loss polymer for backplane interconnect to provide a high I/O density; low-cost diffractive optical elements (DOE) for board-to-backplane interconnect; and use of molded MT array ferrule to reduce overall system size, weight, and cost. In addition to further reducing design and fabrication cycle times, computer simulation tools for optical waveguide and mechanical modeling will be advanced under the POINT program.