Yunmo Koo
Pohang University of Science and Technology
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Publication
Featured researches published by Yunmo Koo.
Applied Physics Letters | 2009
Yunmo Koo; K. M. Song; N. Hur; J. H. Jung; T.-H. Jang; Hwangho Lee; T. Y. Koo; Yongsoo Jeong; Jaehun Cho; Younghun Jo
We report a strain-induced magnetoelectric coupling in BaTiO3/Fe3O4 ferroelectric core/ferrimagnetic shell nanoparticles. The temperature-dependent magnetoresistance and magnetization clearly show several jumps near the structural phase transition temperatures of BaTiO3. Below the Verwey transition temperature of Fe3O4, i.e., at 20 K, the dielectric constant of BaTiO3/Fe3O4 decreases continuously upon application of an external magnetic field, and the observed magnetodielectric curve does not follow the square of the magnetization. We discuss the effect of strain on the electric field-dependent magnetic anisotropy near the core/shell interface.
international electron devices meeting | 2013
Euijun Cha; Jiyong Woo; Daeseok Lee; Sangheon Lee; Jeonghwan Song; Yunmo Koo; Jihyun Lee; Chan Gyung Park; Moon Young Yang; Katsumasa Kamiya; Kenji Shiraishi; Blanka Magyari-Köpe; Yoshio Nishi; Hyunsang Hwang
The scaling and 3-D integration issues of NbO<sub>2</sub> with threshold switching characteristics were investigated for ReRAM selector device. To avoid the process problems of Pt electrode, we tested ReRAM and selector devices with conventional electrodes (TiN and W). By adopting 10nm-thick TiN bottom electrode with low thermal conductivity, we could significantly reduce the threshold current for insulator-metal transition (I-M-T) due to the heat confinement effect. We have evaluated for the first time both 1S1R (NbO<sub>2</sub>/TaO<sub>x</sub>) and hybrid (NbO<sub>2</sub>/Nb<sub>2</sub>O<sub>5</sub>) devices. We have confirmed the feasibility of high density vertical memory device by adopting NbO<sub>2</sub> I-M-T selector device.
Advanced Materials | 2015
Daeseok Lee; Jaesung Park; Jaehyuk Park; Jiyong Woo; Euijun Cha; Sangheon Lee; Kibong Moon; Jeonghwan Song; Yunmo Koo; Hyunsang Hwang
A 3D high-density switching device is realized utilizing titanium oxide, which is the most optimum material, but which is not practically demonstrated yet. The 1S1R (one ReRAM with the developed switching device) exhibits memory characteristics with a significantly suppressed sneak current, which can be used to realize high-density ReRAM applications.
IEEE Electron Device Letters | 2014
Jeonghwan Song; Daeseok Lee; Jiyong Woo; Yunmo Koo; Euijun Cha; Sangheon Lee; Jaesung Park; Kibong Moon; Saiful Haque Misha; Amit Prakash; Hyunsang Hwang
Current overshoot has severe effects on the reliability of resistive random access memory (RRAM). It is well known that the current overshoot during the SET process is caused by parasitic capacitance. In this letter, we observed a different type of current overshoot during the RESET process. The RESET current overshoot was confirmed to have severe effects on the endurance of RRAM. We also demonstrated the relation between the current overshoot and the intrinsic capacitive elements of each state of RRAM. Finally, an optimized pulse shape was proposed to minimize the current overshoot and was experimentally verified to significantly improve the variability and endurance in a typical RRAM device with a W/Zr/HfO2/TiN structure.
IEEE Electron Device Letters | 2013
Sangheon Lee; Daeseok Lee; Jiyong Woo; Euijun Cha; Jaesung Park; Jeonghwan Song; Kibong Moon; Yunmo Koo; Behnoush Attari; Nusrat Tamanna; Misha Saiful Haque; Hyunsang Hwang
The effects of stack and defect engineering of metal-oxide layers on resistive switching uniformity were investigated to obtain resistive random access memory (ReRAM) with excellent switching reliability. Uniform switching, parameters, such as set voltage (Vset), reset voltage (Vreset), low-resistance state, high-resistance state, and retention characteristics, were significantly improved by stack and defect engineering. Furthermore, the initial forming operation, which is a nuisance, was removed to realize cross-point ReRAM.
symposium on vlsi technology | 2016
Yunmo Koo; Kyungjoon Baek; Hyunsang Hwang
We demonstrated binary Ovonic threshold switching (OTS) materials (ZnTe, GeTe, and SiTe) and the composition dependent electrical properties. Among those materials, amorphous SiTe-film deposited at room-temperature (RT) process showed excellent OTS properties such as high off resistance (~20GΩ at 0.2V), low on resistance (<;1kΩ at 1.2V), high selectivity (~106), extreme SS (<;1mV/dec), fast operating speed (2ns transition after 10ns delay), and good endurance (>500k cycles). In addition, the origin of the electronic switching of the binary OTS device was examined.
Nanotechnology | 2014
Kibong Moon; Sangsu Park; Jun-Woo Jang; Daeseok Lee; Jiyong Woo; Euijun Cha; Sangheon Lee; Jaesung Park; Jeonghwan Song; Yunmo Koo; Hyunsang Hwang
We have investigated the analogue memory characteristics of an oxide-based resistive-switching device under an electrical pulse to mimic biological spike-timing-dependent plasticity synapse characteristics. As a synaptic device, a TiN/Pr0.7Ca0.3MnO3-based resistive-switching device exhibiting excellent analogue memory characteristics was used to control the synaptic weight by applying various pulse amplitudes and cycles. Furthermore, potentiation and depression characteristics with the same spikes can be achieved by applying negative and positive pulses, respectively. By adopting complementary metal-oxide-semiconductor devices as neurons and TiN/PCMO devices as synapses, we implemented neuromorphic hardware that mimics associative memory characteristics in real time for the first time. Owing to their excellent scalability, resistive-switching devices, shows promise for future high-density neuromorphic applications.
Applied Physics Letters | 2014
Sangheon Lee; Jiyong Woo; Daeseok Lee; Euijun Cha; Jaesung Park; Kibong Moon; Jeonghwan Song; Yunmo Koo; Hyunsang Hwang
In this study, the effect of the oxygen profile and thickness of multiple-layers TiOx on tunnel barrier characteristics was investigated to achieve high non-linearity in low-resistance state current (ILRS). To form the tunnel barrier in multiple-layer of TiOx, tunnel barrier engineering in terms of the thickness and oxygen profile was attempted using deposition and thermal oxidation times. It modified the defect distribution of the tunnel barrier for effective suppression of ILRS at off-state (½VRead). By inserting modified tunnel barrier in resistive random access memory, a high non-linear ILRS was exhibited with a significantly lowered ILRS for ½VRead.
symposium on vlsi technology | 2014
Jiyong Woo; Jeonghwan Song; Kibong Moon; Jihyun Lee; Euijun Cha; Amit Prakash; Daeseok Lee; Sangheon Lee; Jaesung Park; Yunmo Koo; Chan Gyung Park; Hyunsang Hwang
We demonstrate a selector device with excellent performances (J<sub>MAX</sub> > 10<sup>7</sup>A/cm<sup>2</sup>, switching speed <; 20ns) at the 30nm cell size. Furthermore, these promising device characteristics were achieved in a fully CMOS compatible stack (W/Ta<sub>2</sub>O<sub>5</sub>/TaO<sub>x</sub>/TiO<sub>2</sub>/TiN) with extremely thin oxide layer (<; 10nm). Through the comprehensive understanding on the exponential I-V curve, the effect of intrinsic/extrinsic factors such as scaling (area and thickness), and parasitic components were systemically investigated.
IEEE Electron Device Letters | 2015
Yunmo Koo; Stefano Ambrogio; Jiyong Woo; Jeonghwan Song; Daniele Ielmini; Hyunsang Hwang
Retention of the low resistance state (LRS) in resistive random access memory (ReRAM) significantly decreases at increasing electrical stress due to barrier lowering of ion migration and Joule heating. The LRS failure rate under externally applied bias could be modeled by adopting an Arrhenius equation for ion migration. Accelerated retention failure under voltage stress is explained by the combination of two effects: 1) lowering of the ion migration barrier by external electric field and 2) thermal energy enhancement through local Joule heating. Based on this model, an improved methodology for ReRAM data retention test is proposed, allowing to reduce the testing temperature and the experimental time by several orders of magnitude by applying a relatively low voltage.