Yuri Bunimovich

Silicon nanowires as efficient thermoelectric materials

Thermoelectric materials interconvert thermal gradients and electric fields for power generation or for refrigeration. Thermoelectrics currently find only niche applications because of their limited efficiency, which is measured by the dimensionless parameter ZT—a function of the Seebeck coefficient or thermoelectric power, and of the electrical and thermal conductivities. Maximizing ZT is challenging because optimizing one physical parameter often adversely affects another. Several groups have achieved significant improvements in ZT through multi-component nanostructured thermoelectrics, such as Bi2Te3/Sb2Te3 thin-film superlattices, or embedded PbSeTe quantum dot superlattices. Here we report efficient thermoelectric performance from the single-component system of silicon nanowires for cross-sectional areas of 10 nm × 20 nm and 20 nm × 20 nm. By varying the nanowire size and impurity doping levels, ZT values representing an approximately 100-fold improvement over bulk Si are achieved over a broad temperature range, including ZT ≈ 1 at 200 K. Independent measurements of the Seebeck coefficient, the electrical conductivity and the thermal conductivity, combined with theory, indicate that the improved efficiency originates from phonon effects. These results are expected to apply to other classes of semiconductor nanomaterials.

A 160-kilobit molecular electronic memory patterned at 10 11 bits per square centimetre

The primary metric for gauging progress in the various semiconductor integrated circuit technologies is the spacing, or pitch, between the most closely spaced wires within a dynamic random access memory (DRAM) circuit. Modern DRAM circuits have 140 nm pitch wires and a memory cell size of 0.0408 μm2. Improving integrated circuit technology will require that these dimensions decrease over time. However, at present a large fraction of the patterning and materials requirements that we expect to need for the construction of new integrated circuit technologies in 2013 have ‘no known solution’. Promising ingredients for advances in integrated circuit technology are nanowires, molecular electronics and defect-tolerant architectures, as demonstrated by reports of single devices and small circuits. Methods of extending these approaches to large-scale, high-density circuitry are largely undeveloped. Here we describe a 160,000-bit molecular electronic memory circuit, fabricated at a density of 1011 bits cm-2 (pitch 33 nm; memory cell size 0.0011 μm2), that is, roughly analogous to the dimensions of a DRAM circuit projected to be available by 2020. A monolayer of bistable, [2]rotaxane molecules served as the data storage elements. Although the circuit has large numbers of defects, those defects could be readily identified through electronic testing and isolated using software coding. The working bits were then configured to form a fully functional random access memory circuit for storing and retrieving information.

Electrochemical fabrication of conducting polymer nanowires in an integrated microfluidic system

In this paper, we introduce a new approach for the in situ electrochemical fabrication of an individually addressable array of conducting polymer nanowires (CPNWs) positioned within an integrated microfluidic device and also demonstrate that such an integrated device can be used as a chemical sensor immediately after its construction.