Yusuke Tajima
Raytheon
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Featured researches published by Yusuke Tajima.
IEEE Transactions on Electron Devices | 1981
Yusuke Tajima; B. Wrona; K. Mishima
A large-signal GaAs FET model is derived based on dc characteristics of the device. Analytical expressions of modeled nonlinear elements are presented in a form convenient for circuit design. Power saturation and gain characteristics of a GaAs FET are studied theoretically and experimentally. An oscillator design employing the large-signal model is demonstrated.
international microwave symposium | 1990
A. Platzker; A. Palevsky; S. Nash; W. Struble; Yusuke Tajima
The authors build and utilized a pulsed I-V system which is capable of reaching any current-voltage point of three-terminal devices from any arbitrarily chosen DC bias point. The system, which can be used on wafer, serves as an invaluable tool for device modeling and process diagnostics. Direct dependence of the pulsed I-V curves on the DC bias was found in GaAs MESFETs and HEMTs (high-electron mobility transistors).<<ETX>>
international microwave symposium | 1991
S.L.G. Chu; J. Huang; W. Struble; G. Jackson; N. Pan; M.J. Schindler; Yusuke Tajima
A highly linear GaAs MESFET has been developed. This device incorporates a spike profile in its active channel and was designed specifically for linearity. A third-order intercept (IP3) and a 1 dB compression power of 43 dBm and 19 dBm, respectively, have been measured on a 400 mu m device at 10 GHz. The difference between these two numbers, 24 dB, is the largest yet reported for a MESFET. This device also dissipates only 400 mW of DC power yielding a linearity figure-of-merit (IP3/P/sub DC/) of 50.<<ETX>>
international microwave symposium | 1989
S.L.G. Chu; Yusuke Tajima; J.B. Cole; A. Platzker; M.J. Schindler
The authors describe the design, fabrication, and performance of a 4-18 GHz matrix distributed amplifier which incorporates a novel biasing scheme enabling the amplifier to run at higher voltages while drawing only half of the current of conventional multistage amplifiers having comparable gain levels. A voltage divider is used at the input of the FET pair to derive the gate bias, ensuring that both FETs are biased at the same point. This scheme enables the stages to be connected in cascade at RF frequencies and in cascode for DC biasing, thus conserving current. The amplifier shows >13 dB gain across the frequency band using a chip area of only 1.9 mm*2.1 mm.<<ETX>>The authors describe the design, fabrication, and performance of a 4-18-GHz matrix distributed amplifier. This amplifier incorporates a novel biasing scheme which enables the stages to be connected in cascade at RF frequencies and in cascode for DC biasing, thus conserving current. A gain of 14 dB+or-1.5 dB has been measured over the 4-18-GHz frequency band in a chip area of only 1.9 mm*2.1 mm.<<ETX>>
international microwave symposium | 1991
J.C. Huang; G. Jackson; S. Shanfield; W. Hoke; P. Lyman; D. Atwood; P. Saledas; M.J. Schindler; Yusuke Tajima; A. Platzker; D. Masse; H. Statz
A PHEMT with record-high output power, gain and power-added efficiency at 10 and 18 GHz has been achieved due to the use of a novel method to improve the gate-drain reverse breakdown voltage. A critical surface problem was uncovered and resolved. Silicon nitride was deposited as surface passivation. The results of this work suggest that, in addition to superior low-noise performance, the PHEMT is also very promising for high-performance, power amplications in the X- to Ku-band frequency range.<<ETX>>
[1991] GaAs IC Symposium Technical Digest | 1991
W. Struble; S.L.G. Chu; M.J. Schindler; Yusuke Tajima; J.C. Huang
A technique has been developed for modeling intermodulation distortion of GaAs MESFETs using pulsed I-V drain characteristics. The technique involves measuring the drain I-V characteristic using short drain and gate pulses from a DC operating point. This pulsed I-V characteristic is used to model the nonlinearity of the drain current source. In addition, S-parameters measured about the DC bias point are used to model the gate capacitance nonlinearity. These nonlinearities are combined into a single model, and the harmonic balance method is used to simulate intermodulation performance. This technique has been used to simulate the third-order intermodulation distortion of a spike-doped MESFET and to investigate sensitivities of source and load impedance and device nonlinearities on intermodulation performance.<<ETX>>
15th Annual GaAs IC Symposium | 1993
Peter M. Bacon; E. Olsen; B. Cole; Yusuke Tajima; D. Kaczman
A dual-channel downconverter has been developed targeted for the Direct Broadcast Satellite Television market. In the established European and the developing North American DBS markets, the system design utilizes dual-polarized signals for program transmission. To reduce the receiver complexity it is desirable to have a monolithic dual-channel downconverter that minimizes parts count and reduces assembly/manufacturing costs while maintaining, and perhaps improving total system performance. This was the motivation for developing a GaAs MMIC dual-channel downconverter.<<ETX>>
IEEE Control Systems Magazine | 1991
P. Bernkopf; Yusuke Tajima
A GaAs monolithic subharmonically pumped (SHP) Ka-band frequency converter has been developed. The complete frequency converter monolithic millimeter-wave integrated circuit (MMIC), having six microwave ports, consists of an SP2T RF switch, LO (local oscillator) buffer amplifier, anti-parallel diode mixer, three-stage IF (intermediate frequency) amplifier, and an SP3T IF switch. To minimize circuit cost, the converter was fabricated with conventional MMIC material and processing. The frequency converter exhibited a conversion gain of 8 dB and a single sideband noise figure of 20 dB. This IC is the first demonstrated monolithic Ka-band SHP frequency converter and has a higher level of integration than previous MMIC SHP mixers.<<ETX>>
IEEE Control Systems Magazine | 1994
M.C. Tsai; Yusuke Tajima
A new compact 90/spl deg/ IF combiner has been developed for wireless communication applications. Using a simple R-C network, a differential amplifier, and IF amplifiers, an IF combiner has been designed and fabricated. Over 30 dB of gain with phase difference better than 10/spl deg/ from 90/spl deg/ and amplitude balance 2.5 dB from 50 MHz to 250 MHz has been realized in a chip area of 1/spl times/0.7 mm/sup 2/.<<ETX>>
international electron devices meeting | 1980
Yusuke Tajima; Beverly Wrona; Katsuhiko Mishima
A large signal GaAs FET model is derived based on dc characteristics of the devices. Analytical expressions of nonlinear elements in the model are presented in a form convenient for circuit design. Power saturation and gain characteristics of a GaAs FET are studied theoretically and experimentally. An oscillator design employing the large signal model is demonstrated.