Yutian Lei

A General Method for Analyzing Resonant and Soft-Charging Operation of Switched-Capacitor Converters

Traditionally, switched-capacitor (SC) converters have suffered from high transient currents, which limit both the efficiency and power density of such converters. Soft-charging operation can be employed to eliminate the current transients and greatly improve the power density of SC converters. In this approach, a second-stage magnetic converter is cascaded with the SC stage to act as a controlled current load. Another approach is to use resonant SC converters with zero-current switching. This paper shows that resonant and soft-charging operations of SC converters are closely related, and a technique will be proposed, which achieves either operation by adding a single inductor to existing SC topologies. In addition, since most preexisting resonant or soft-charging SC converters were devised in an ad-hoc manner, this paper formulates an analytical method that can determine whether an existing conventional SC converter topology is compatible with the proposed approach. A number of common SC topologies are analyzed, including Dickson, series-parallel, ladder, Fibonacci, and doubler configurations. Through comparison to simulated results, as well as experimental work, the proposed method is validated and a family of high-performance SC converters is obtained.

A 2 kW, single-phase, 7-level, GaN inverter with an active energy buffer achieving 216 W/in3 power density and 97.6% peak efficiency

High efficiency and compact single phase inverters are desirable in many applications such as solar energy harvesting and household appliances. This paper presents a 2 kW, 60 Hz, 450 VDC to 240 VRMS power inverter, designed and tested subject to the specifications of the Google/IEEE Little Box Challenge. The inverter features a 7-level flying capacitor multilevel converter, with low-voltage GaN switches operating at 120 kHz, the highest switching frequency to date at this power level. The inverter also includes an active buffer for twice-line-frequency power pulsation decoupling, which reduces the required capacitance by a factor of eight compared to conventional passive decoupling capacitor, while maintaining an efficiency above 99%. The inverter prototype is a self-contained box that achieves a high power density of 216 W/in3 and a peak overall efficiency of 97.6% while meeting the constraints including input current ripple, load transient, thermal and EMC specifications.

An analytical method to evaluate flying capacitor multilevel converters and hybrid switched-capacitor converters for large voltage conversion ratios

This work investigates the use of multilevel conversion in dc-dc applications that involve a large voltage conversion ratio. A quantitative method that can serve as a guide to compare and design multilevel topologies for large conversion ratio applications is presented. The proposed method keeps the conduction loss and switching loss the same across the different converters and employs the passive component volume as the single performance metric. As examples, flying capacitor multilevel converters (FCMC) and hybrid switched-capacitor (SC) converters are compared to conventional two-level buck converters, and are shown analytically to have significantly reduced passive component size. Three converter prototypes are implemented, based on the presented methodology to experimentally validate the method as well as demonstrate the advantages of multilevel converters.

Analysis of Switched-capacitor DC-DC Converters in Soft-charging Operation

This paper formulates a formal analysis method for switched-capacitor (SC) dc-dc converters in soft-charging operation. Through soft-charging, the charging/discharging loss of a SC converter can be minimized or even eliminated by allowing the output voltage to vary to a greater extent. Usually a soft-charging SC converter is followed by a magnetic converter for ripple reduction and better regulation. For any given two-phase switched-capacitor topology, the proposed method can be used to determine whether soft-charging is at all possible and if so, the required capacitor sizes to achieve soft-charging. The proposed method also gives the resultant output voltage ripple due to soft-charging operation. A number of different topologies are analyzed, including Dickson, Series-parallel, Ladder, Fibonacci and Doubler configurations. The analysis gives insights regarding the expected improvement in performance when these topologies are cascaded by a magnetic converter. Through comparison to simulated results and existing work, the validity of the proposed method is confirmed.

A high-efficiency high energy density buffer architecture for power pulsation decoupling in grid-interfaced converters

A high-efficiency high-energy-density buffer architecture is proposed for power pulsation decoupling in power conversion between DC and single phase AC. We present an active decoupling solution that yields improved efficiency and reduced circuit complexity compared to existing solutions. By connecting a buffer converter in series with the main decoupling capacitor, the main capacitor is allowed larger ripple for improved energy utilization (and thus much reduced volume), while the DC bus voltage is maintain close to ripple free. The buffer converter has low voltage stress and is only processing a small fraction of the total power of the entire architecture, allowing a very small active circuit volume and very high system efficiency. A control scheme is proposed to exploit the small remaining bus ripple to compensate the power loss in the power converter and balance the power cycle of the buffer architecture. A 2 kW hardware prototype has been built to demonstrate the benefit of the proposed solution. The hardware prototype achieves 20 times capacitance reduction and 2 times overall volume reduction compared to the conventional passive decoupling solution. An energy density of 110 W/inch3 and an efficiency above 98.7% across a wide load range has been experimentally verified.

Experimental evaluation of capacitors for power buffering in single-phase power converters

Single-phase inverters and rectifiers require the use of an energy buffer to absorb the twice-line-frequency power ripple present on the AC side. Historically this challenge has been addressed by the use of large electrolytic capacitors. However reliability constraints and the need for improved system performance have motivated designers to seek other capacitor technologies such as ceramic and metal film which are frequently used in conjunction with active filtering converters to reduce the volume of required capacitance. Active filtering converters cycle the capacitor voltage over a wide voltage range while maintaining a constant DC bus voltage. This large-swing operation is very different from that of most other filtering applications, and the data sheet parameters available for commercial capacitors may be ineffective or require special care for calculating characteristics such as efficiency and energy storage capability. This work presents an experimental setup for evaluating capacitor performance under a large voltage swing. Energy storage data for several capacitors in the 50 V to 450 V range from several manufacturers is included. The approach and findings of this paper can serve as an aid to power electronics designers for the selection and evaluation of capacitors in energy buffering applications.

Split-Phase Control: Achieving Complete Soft-Charging Operation of a Dickson Switched-Capacitor Converter

Switched-capacitor (SC) converters are gaining popularity due to their high power density and suitability for on-chip integration. Soft-charging techniques can be used to eliminate the current transient during the phase switching instances, and improve the power density and efficiency of SC converters. In this paper, we propose a split-phase control scheme that enables the Dickson converter to achieve complete soft-charging operation, which is not possible using the conventional two-phase control. An analytical method is extended to understand and design split-phase controlled Dickson converters. The proposed technique and analysis are verified by both simulation and experimental results. An 8-to-1 step-down Dickson converter is built to demonstrate the reduction in output impedance and improvement in efficiency as a result of the split-phase controlled soft-charging operation.

Architecture and control of a high energy density buffer for power pulsation decoupling in grid-interfaced applications

In this paper we propose a series-stacked partial power processing architecture and the associated control scheme for double-line-frequency power pulsation decoupling in single phase inverter/rectifier applications. The proposed architecture exploits series stacking of the energy storage capacitors and a buffer converter across the DC bus such that the buffer converter only experiences low voltage stress and processes only a fraction of the total buffer power, while still maintaining a close to ripple free DC bus voltage. Such arrangement results in improved efficiency and higher energy density compared to conventional active decoupling solutions. A control scheme is proposed to exploit the small remaining bus ripple to compensate the power loss in the buffer converter and balance the power cycle of the architecture. A 2 kW hardware prototype has been built to demonstrate the benefit of the proposed solution. The hardware prototype achieves significant volume reduction compared to the conventional passive decoupling solution. An energy density of 611 W/in3 (by component volume) for the hardware prototype and an efficiency above 97.9% across a wide range of power and voltage levels has been experimentally verified.

Design and control of a GaN-based, 13-level, flying capacitor multilevel inverter

Multilevel topologies are an appealing method to achieve higher power density inverters for both mobile and stationary systems. This work discusses the design and development of a 13-level, flying capacitor multilevel (FCML) inverter. Operating from an 800 V bus, this inverter requires switches with a voltage blocking capability of less than 80 V. A 120 kHz switching frequency is enabled through the use of GaN FETs and the development of custom integrated switching cells, which reduce commutation loop inductance and allow for a modular design. Additionally, the frequency multiplication effect of FCML inverters allows the output inductor of the inverter to be made exceptionally small (4.7 μH) while maintaining a 0.7 % THD due to the 1.44 MHz effective inductor ripple frequency.

A 1.2 MHz, 25 V to 100 V GaN-based resonant Dickson switched-capacitor converter with 1011 W/in3 (61.7 kW/L) power density

Switched-capacitor (SC) converters have generated interest in the research community due to the possibility of achieving high power densities at high voltage conversion ratios. This work proposes a resonant, 1-to-4 voltage conversion ratio Dickson SC converter. A single inductor is utilized to achieve zero current switching of all transistors, which allows for high switching frequency and high conversion efficiency. A split-phase control scheme is used in order to eliminate the current transients associated with the Dickson SC converter and the resultant power loss. Employing these techniques, a 25 V to 100 V Dickson SC converter prototype is implemented with GaN transistors. The converter achieves a switching frequency of 1.2 MHz and a peak efficiency of 92 %. The power stage of the converter is able to achieve a power density of a 1011 W/in3 at 263 W.