Pradeep S. Shenoy

Differential Power Processing for Increased Energy Production and Reliability of Photovoltaic Systems

Conventional energy conversion architectures in photovoltaic (PV) systems are often forced to tradeoff conversion efficiency and power production. This paper introduces an energy conversion approach that enables each PV element to operate at its maximum power point (MPP) while processing only a small fraction of the total power produced. This is accomplished by providing only the mismatch in the MPP current of a set of series-connected PV elements. Differential power processing increases overall conversion efficiency and overcomes the challenges associated with unmatched MPPs (due to partial shading, damage, manufacturing tolerances, etc.). Several differential power processing architectures are analyzed and compared with Monte Carlo simulations. Local control of the differential converters enables distributed protection and monitoring. Reliability analysis shows significantly increased overall system reliability. Simulation and experimental results are included to demonstrate the benefits of this approach at both the panel and subpanel level.

Differential Power Processing for DC Systems

This paper introduces an approach to dc power delivery that reduces power loss by minimizing redundant energy conversion. Existing power distribution techniques tend to increase the number of cascaded conversion stages, which limits overall efficiency. Differential power processing enables independent load regulation, while processing only a small portion of the total load power. Bulk power conversion occurs once. Load voltage domains are connected in series, and differential converters act as controllable current sources to regulate intermediate nodes. This enables independent, low supply voltages, which can reduce system energy consumption, especially in digital circuits and solid-state lighting. Since differential voltage regulators process a fraction of the load power, decreased size, cost, and conversion losses are attainable. Under balanced load conditions, secondary differential converters do not process any power. This paper analyzes several differential power delivery architectures that can be applied to homogenous and heterogeneous loads at various levels: chip, board, blade, etc. A variety of operating conditions for a test system with four series voltage domains are examined in simulation and verified with experimental hardware. Results in a reference application show a 7–8% decrease in input power and 6–7 percentage points increase in overall conversion efficiency as compared to a conventional cascaded approach.

Comparative analysis of differential power conversion architectures and controls for solar photovoltaics

Conventional solar photovoltaic (PV) energy conversion architectures are often forced to trade off efficiency and cost for increased power production. The differential power processing approach overcomes this limitation by enabling each PV element to operate at its maximum power point (MPP) while only processing a small fraction of the total power produced. This paper analyzes several differential energy conversion architectures and the associated local controls. Models are developed to describe operation of PV-to-PV and PV-to-bus differential converters. The overall power output of each system under various environmental conditions is compared. A Monte Carlo approach is used to compare three differential conversion implementations over a range of MPP conditions. Experimental results are included for a PV-to-PV, buck-boost differential converter to demonstrate the potential for increased energy production.

Converter Rating Analysis for Photovoltaic Differential Power Processing Systems

When photovoltaic (PV) cells are connected in series, they experience internal and external mismatch that reduces output power. Differential power processing (DPP) architectures achieve high system efficiency by processing a fraction of the total power while maintaining distributed local maximum power point operation. This paper details the computational methods and analysis used to determine the operation of PV-to-bus and PV-to-PV DPP architectures with rating-limited converters. Simulations for both DPP architectures are used to evaluate system performance over 25 years of operation. Based on data from field studies, a PV power coefficient of variation can be estimated as 0.086 after 25 years. An improvement figure of merit reflecting the ratio of energy produced to that delivered in a conventional system is introduced to evaluate comparative performance. Converter ratings of 15-17% for PV-to-bus and 23-33% for PV-to-PV architectures are identified as appropriate ratings for a 15-submodule system (five PV panels in series). Both DPP architectures with these ratings are shown to deliver up to 2.8% more power compared to a conventional series-string architecture based on the expected panel variation over 25 years of operation. DPP converters also outperform dc optimizers in terms of lifetime performance.

Differential power processing architecture for increased energy production and reliability of photovoltaic systems

Conventional energy conversion architectures in photovoltaic (PV) systems are often forced to trade off conversion efficiency and power production. This paper introduces a power processing architecture that enables each PV element to operate at its maximum power point (MPP) while only processing a small fraction of the total power produced. This is accomplished by providing only the mismatch in the MPP current of a set of series-connected PV elements. The differential power processing architecture increases overall conversion efficiency and overcomes the challenges of unmatched MPPs (due to partial shading, damage, manufacturing tolerances, etc.). Local control of the differential converters enables distributed protection and monitoring. The reliability analysis included in this paper shows significantly increased overall system reliability. Simulation and experimental results are included to demonstrate the benefits of this approach.

Beyond time-optimality: Energy-based control of augmented buck converters for near ideal load transient response

This paper presents a buck converter augmented with additional energy paths that enable a near null response to load transients. Fundamental performance limits, such as slew-rate limits, are overcome resulting in increased bandwidth with a response that is faster than previously established “minimum time” or “time optimal” control of conventional buck converters. An energy-based method is presented that allows simplified control of the augmentation branches. An efficiency analysis shows that power loss is dependent on load step size and frequency. Experimental results for a 12 V input, 5 V output, 25 W buck converter demonstrate that for 60 percent load steps the augmented converter has half the settling time, four times less peak-to-peak voltage deviation, and no inductor current overshoot as compared to the minimum time response.

Solid-State Solar Simulator

This paper presents an efficient, low-cost, and versatile LED-based solar simulator intended to produce a well-characterized spectrum for tests of solar cells and other photosensitive devices. Three major design aspects are addressed: LED spectra, power converters for LED drive, and control. The visible light of a standard solar spectrum is simulated using six LED colors. The number of LEDs and their placement for uniformity are addressed. Boost converters under current-mode control are used to achieve reproducible LED brightness through adjustable currents, or equivalent radiant-flux commands. The independent control of the six colors can simulate a range of different light sources and solar spectra. Uniformity tests verify that the system achieves standard spectral uniformity requirements over an area of 100 mm × 100 mm in simulations and 100 mm × 50 mm in experiments. LEDs in the proposed simulator consume less power and reduce the simulator size compared to the available state of the art. The user-friendly interface also allows active control of the simulated spectrum.

A series-stacked architecture for high-efficiency data center power delivery

As the number and power density of servers within todays data centers continues to increase, efficient power delivery is becoming a major industry concern. This paper proposes a series-connected power distribution architecture for data center server clusters, which decouples conversion losses from the total power delivered - allowing for conversion losses to remain relatively fixed, even as server power requirements increase. Voltage regulation of the servers within the cluster is achieved by the use of differential power processing hardware. This work also provides an experimental comparison between the fully-operational series-connected cluster implementation and the best-in-class commercial power distribution hardware - showing more than a five times reduction in conversion losses. The measured system-level efficiency for a best-in-class conventional power delivery architecture was 97.5%, and the measured system efficiency of the proposed architecture was 99.5%.

Photovoltaic differential power converter trade-offs as a consequence of panel variation

Photovoltaic (PV) elements have inherent variation between cells and panels due to manufacturing tolerance, degradation, and situational differences. This variation increases over system lifetime and creates maximum power point current mismatch that reduces output power when PV elements are strung in series. Traditionally, mismatch loss is addressed using cascaded converters. However, this research examines a differential converter architecture that achieves higher efficiency by processing a fraction of the total power. The effect of PV maximum power point (MPP) current variance on output power is modeled and examined using Monte Carlo simulation for the series string architecture with and without bypass diodes, and the PV-to-Bus and PV-to-PV differential power processing (DPP) architectures at various power ratings. Hot spotting can be a problem that significantly reduces output power. PV elements at fault can be bypassed, passively or actively, to reduce power loss. Simulation results show that both DPP architectures employing active bypass are able to compensate mismatch over the 25-year lifetime of a PV system with converters sized at approximately 10-20% of the panel ratings.

System energy minimization via joint optimization of the DC-DC converter and the core

This paper addresses the problem of designing energy-efficient embedded systems by jointly optimizing the power consumption of both the DC-DC converter and the computational core. Past work has shown that there exists a minimum energy operating point (MEOP) in the subthreshold region for computational cores (C-MEOP), at which the dynamic and leakage powers are balanced. The MEOP is defined by the 3-tuple consisting of the optimum energy consumption E∗, optimum voltage V∗ and optimum frequency f∗. First, we show that the DC-DC converter losses in dynamic voltage scaling (DVS) cause the overall system MEOP (S-MEOP) to differ significantly from C-MEOP. Simulations in a 130-nm, 1.2V commercial CMOS process show that operation at S-MEOP results in a 45.5% energy savings over operating at a core voltage V∗C suggested by C-MEOP. The DC-DC converter efficiency is also improved by 2.2X. Second, we show that architectural techniques such as parallelization cause the S-MEOP to approach C-MEOP. Thus, it is sufficient to track C-MEOP — a much easier task on-chip — in order to account for process variations. We show that DC-DC converter losses reduces in subthreshold region but increases in superthreshold region when parallelization is employed. This observation leads us to propose a reconfigurable core architecture that improves the converter efficiency by 2.3X at C-MEOP, and makes energy consumption at S-MEOP and C-MEOP to be within 4% of each other, while improving throughput in the subthreshold region by at least 8X. Finally, we show that pipelining, which has been proposed to decrease core energy at C-MEOP while improving throughput [1], adversely affects the S-MEOP. The pipelined-core system energy at S-MEOP is 85% lower than the pipelined-core system energy when operating at the C-MEOP voltage V∗C.