Zaharije Radivojevic
University of Belgrade
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Featured researches published by Zaharije Radivojevic.
IEEE Transactions on Education | 2009
Bosko Nikolic; Zaharije Radivojevic; Jovan Djordjevic; Veljko Milutinovic
Courses in Computer Architecture and Organization are regularly included in Computer Engineering curricula. These courses are usually organized in such a way that students obtain not only a purely theoretical experience, but also a practical understanding of the topics lectured. This practical work is usually done in a laboratory using simulators of computer systems. Since the open literature contains a variety of simulators being used for such purposes, this paper attempts to give a survey of simulators suitable for teaching courses in computer architecture and organization, to establish the evaluation criteria and to evaluate selected simulators according to these criteria.
Information & Software Technology | 2015
Sasa Stojanovic; Zaharije Radivojevic; Milos Cvetanovic
Abstract Context Detection of an unauthorized use of a software library is a clone detection problem that in case of commercial products has additional complexity due to the fact that only binary code is available. Objective The goal of this paper is to propose an approach for estimating the level of similarity between the procedures originating from different binary codes. The assumption is that the clones in the binary codes come from the use of a common software library that may be compiled with different toolsets. Method The approach uses a set of software metrics adapted from the high level languages and it also extends the set with new metrics that take into account syntactical changes that are introduced by the usage of different toolsets and optimizations. Moreover, the approach compares metric values and introduces transformers and formulas that can use training data for production of measure of similarities between the two procedures in binary codes. The approach has been evaluated on programs from STAMP benchmark and BusyBox tool, compiled with different toolsets in different modes. Results The experiments with programs from STAMP benchmark show that detecting the same procedures recall can be up to 1.44 times higher using new metrics. Knowledge about the used compiling toolset can bring up to 2.28 times improvement in recall. The experiment with BusyBox tool shows 43% recall for 43% precision. Conclusion The most useful newly proposed metrics are those that consider the frequency of arithmetic instructions, the number and frequency of occurrences for instructions, and the number of occurrences for target addresses in calls. The best way to combine the results of comparing metrics is to use a geometric mean or when previous knowledge is available, to use an arithmetic mean with appropriate transformer.
IEEE Transactions on Education | 2011
Milos Cvetanovic; Zaharije Radivojevic; Vladimir A. Blagojević; Miroslav Bojovic
This paper presents a Web-based educational system, ADVICE, that helps students to bridge the gap between database management system (DBMS) theory and practice. The usage of ADVICE is presented through a set of laboratory exercises developed to teach students conceptual and logical modeling, SQL, formal query languages, and normalization. While working on the exercises, students use the system to access real databases, and the system provides them with feedback about their solutions. From the perspective of an instructor, the system allows easy exercise management and continual progress monitoring. The paper also describes a practical experience with the use of ADVICE on a database course over a three-year period.
engineering of computer based systems | 2011
Zaharije Radivojevic; Milos Cvetanovic; Jovan Ðordevic
This paper presents a general purpose discrete event simulator, named SLEEP, that helps students to bridge the gap between theory and practice in the domain of Computer Architecture and Organization simulator design. The motivation for developing SLEEP is given after an analysis of simulators available in the open literature. The analysis is followed by implementation details explaining execution and simulation algorithms of SLEEP. Then, the SLEEP simulator features are briefly described. Finally, the performance evaluation with generated test workload is presented.
The Computer Journal | 2015
Zaharije Radivojevic; Milos Cvetanovic; Sasa Stojanovic
License violation analysis may require digital forensics in the performance of a time-consuming search in order to find out whether a binary code of a product contains a procedure that originates from a source code for which a license is required. The conducted experiment shows that the production of a binary code using an arbitrary compiler decreases results of the evaluated solutions up to 10 times. The best performing solution, among those evaluated, uses software metrics for assessing similarities between procedures and ranks procedures from the binary code according to their similarities with the target forensics procedure. This paper tries to improve the ranking by proposing five techniques for making similarities assessment more robust against compiler transformations. The proposed techniques filter stack instructions and transfer instructions, retain partial information about the instruction order, simulate inlining, and eliminate procedures that significantly differ from the searched procedure. The techniques are evaluated using a dataset based on the STAMP benchmark and re-evaluated using a dataset based on the BusyBox toolset. The evaluation shows that the use of the proposed techniques increases recall by 47 and 42% for the first and second datasets, respectively.
Computer Applications in Engineering Education | 2018
Zaharije Radivojevic; Zarko Stanisavljevic; Marija Punt
This paper presents a novel visual educational configurable simulator for computer architecture and organization (COCONUT). By using the simulator students can create their own processor with an arbitrary architecture and simple organization on the register transfer level, write an assembly program to be executed on the processor and observe the instruction execution phases of the program on the processor. The students can create their processor by using the simulator of a computer system with fixed and configurable parts. The configurable part allows students to use the simulator for defining the instruction decoding of the processor operation unit and the content of the microprogram memory of the processor control unit. The simulators usage was evaluated at the University of Belgrade—School of Electrical Engineering on two courses for two consecutive school years. The evaluation results showed that 80% of the students stated that the simulator helped them to better understand the course material and that they had a positive user experience with the simulator.
international convention on information and communication technology electronics and microelectronics | 2017
Dj. Pesic; Zaharije Radivojevic; Milos Cvetanovic
This paper attempts to give a survey of some free software tools for wireless sensor networks. It targets teachers and students who might have the need for education in this area. As a first stage in creating this survey, a process of software collection is presented. First collection step is search through the Shanghai list for the first 50 universities. From these universities, available information about used software for wsn-related courses is collected. Additionally, other wsn software surveys are considered. Then, only free, open source and available software are kept, because they are the easiest for students to get it. Then evaluation based on topics coverage and software features is done. Topics are selected from IEEE Curriculum guidelines, while features give emphasis on practical usage from user aspect. Selected topics are embedded systems, computer networks, operating system and system resource management. Features used in the evaluation are support for GUI and command line, programming language learning overhead, ease of installation, extensibility, and platform portability. As a result, following software tools are described: TinyOS, Prowler, Riot, Castalia, Avrora, Shawn, TRMSim-WSN, and Shox.
International Journal of Parallel Programming | 2017
Milos Cvetanovic; Zaharije Radivojevic; Veljko Milutinovic
This paper presents an optimization algorithm for transactional memory with lazy conflict detection. The proposed optimization attempts to minimize the execution time of restarted transactions. Minimizing happens during restart, by avoiding the re-execution of a section of a transaction that is unaffected by the restart. The proposed optimization builds on previous research and differs in that it eliminates the need for the prediction of conflicting accesses and introduces incremental context saving. Moreover, the paper introduces analytical models for estimating the execution time of transactions, with and without the restart optimization, that are developed using the continuous-time model. A critical evaluation comparing analytical models with the simulation results is discussed in the paper.
telecommunications forum | 2014
Bojan Stankic; Darko Kojic; Milos Cvetanovic; Milos Dukic; Sasa Stojanovic; Zaharije Radivojevic
File format used for images in embedded devices is mostly determined by limited available resources and performances. This paper proposes a new file format named ERLE which is adapted for usage in embedded devices. The format is presented by explaining the benefits of using this file format on embedded devices and drawbacks of using the standard image formats for image processing on small footprint embedded devices. Moreover, ERLE file format sections are described, as well as compression algorithms that are used and main file auxiliary structures for faster random pixel access.
telecommunications forum | 2012
Ranko Radovanović; Zaharije Radivojevic; Milos Cvetanovic
During their training air traffic controllers acquire theoretical knowledge in the field of aviation law, aircraft performance, theory of flight and what is for them most important air traffic management. In addition to theoretical training controllers spend a large part of the training exercising different scenarios using air traffic control simulators. This paper describes a simulator with distributed architecture that provides support for the simulation of a large number of concurrent users (pilots and controllers) that interact with each other. The simulator enables exercising various scenarios, interactions including air-to-ground and ground-to-ground communications.