Zhechao Wang

Highly efficient nonuniform grating coupler for silicon-on-insulator nanophotonic circuits

We present design, fabrication, and characterization of a silicon-on-insulator grating coupler of high efficiency for coupling between a silicon nanophotonic waveguide and a single mode fiber. By utilizing the lag effect of the dry etching process, a grating coupler consisting of nonuniform grooves with different widths and depths is designed and fabricated to maximize the overlapping between the upward wave and the fiber mode. The measured waveguide-to-fiber coupling efficiency of 64% (-1.9 dB) for the transverse electric polarization is achieved by the present nonuniform grating coupler directly defined on a regular silicon-on-insulator wafer.

Ultracompact low-loss coupler between strip and slot waveguides

We present both theoretical and experimental results of an ultracompact waveguide coupler that is capable of highly efficient coupling of light from strip waveguides to slot waveguides, and vice versa. By optimizing the geometrical parameters, it is possible to achieve extremely low-loss coupling. A coupling efficiency of 97% has been obtained experimentally while keeping the overall size down to the range below 10 mum. Further analysis shows that the proposed coupler has relatively high tolerance to fabrication errors and is wavelength insensitive.

Experimental Demonstration of a High Efficiency Polarization Splitter Based on a One-Dimensional Grating With a Bragg Reflector Underneath

A one-dimensional grating serving both as a polarization beam splitter and a vertical coupler for silicon photonic circuits is designed, fabricated, and characterized. Bragg reflectors are employed to improve greatly the coupling efficiency. Over 50% efficiency for both polarizations are achieved experimentally, and the extinction ratio between them is also high ( -20 dB).

Study of planar defect filtering in InP grown on Si by epitaxial lateral overgrowth

InP thin films have been grown on InP/Si substrate by epitaxial lateral overgrowth (ELOG). The nature, origin and filtering of extended defects in ELOG layers grown from single and double openings in SiO2 mask have been investigated. Whereas ELOG layers grown from double openings occasionally exhibit threading dislocations (TDs) at certain points of coalescence, TDs are completely absent in ELOG from single openings. Furthermore, stacking faults (SFs) observed in ELOG layers grown from both opening types originate not from coalescence, but possibly from formation during early stages of ELOG or simply propagate from the seed layer through the mask openings. A model describing their propagation is devised and applied to the existent conditions, showing that SFs can effectively be filtered under certain conditions. ELOG layers grown from identical patterns on InP substrate contained no defects, indicating that the defect-forming mechanism is in any case not inherent to ELOG itself.

Effect of the Surface Morphology of Seed and Mask Layers on InP Grown on Si by Epitaxial Lateral Overgrowth

Heteroepitaxy of InP on Si by epitaxial lateral overgrowth (ELOG) using a thin seed layer of InP as starting material is investigated, with special attention given to the effect of the surface morphology of the seed and the mask layers on the quality of the ELOG layers. Chemical mechanical polishing (CMP) has been used to improve the morphological and optical quality of InP grown by hydride vapor-phase epitaxy (HVPE) using ELOG. Two approaches have been investigated: polishing the InP seed layer on Si before depositing the SiO2 mask and polishing the SiO2 mask after its deposition on the unprocessed seed layer. For polishing the InP (seed)/Si, a two-step process with an aluminum oxide- and sodium hypochlorite-containing slurry as well as a slurry based on sodium hypochlorite mixed with citric acid was used. For SiO2 mask polishing, a slurry with colloidal silica as an abrasive was employed. In both cases, the SiO2 mask was patterned with double line openings and ELOG carried out in an HVPE reactor. Morphology and crystal quality of the resulting ELOG layers were studied with atomic force microscopy (AFM) and room-temperature panchromatic cathodoluminescence (PC-CL) inxa0situ in a scanning electron microscope (SEM), respectively. The results show that, whereas both polishing approaches result in an ELOG InP layer with good morphology, its surface roughness is lower when the InP (seed)/Si is subjected to CMP prior to deposition of the SiO2 mask, than when only the SiO2 mask is polished. This approach also leads to a decrease in the number of defects generated during coalescence of the ELOG layers.

Polarization-Insensitive Ultrasmall Microring Resonator Design Based on Optimized Si Sandwich Nanowires

Bent Si sandwich nanowires are used and optimized to obtain an ultrasmall polarization-insensitive microring resonator (MRR). The used Si sandwich nanowire has a low refractive index layer between two Si layers with high refractive indexes. By optimizing the refractive index and thickness of the sandwiched layer, the bent Si sandwich nanowire becomes nonbirefringent theoretically. The designed nonbirefringent nanowire has a relatively good fabrication tolerance. By using such a nonbirefringent bent Si sandwich nanowire, an ultrasmall polarization-insensitive MRR is designed.

Towards a monolithically integrated III-V laser on silicon: optimization of multi-quantum well growth on InP on Si

High-quality InGaAsP/InP multi-quantum wells (MQWs) on the isolated areas of indium phosphide on silicon necessary for realizing a monolithically integrated silicon laser is achieved. Indium phosph ...

High efficiency grating couplers for silicon-on-insulator photonic circuits

We have experimentally demonstrated two methods for improving the coupling efficiency of grating couplers. A grating coupler-polarization splitter is measured to have over 50% efficiency for both polarizations. 68% efficiency for single polarization is achieved by a nonuniform grating coupler.

InP overgrowth on SiO2 for active photonic devices on silicon

Integration of III-V materials on silicon wafer for active photonic devices have previously been achieved by growing thick III-V layers on top of silicon or by bonding the III-V stack layers onto a silicon wafer. Another way is the epitaxial lateral overgrowth (ELOG) of a thin III-V material from a seed layer directly on the silicon wafer, which can be used as a platform for the growth of active devices. As a prestudy, we have investigated lateral overgrowth of InP by Hydride Vapor Phase Epitaxy (HVPE) over SiO2 masks of different thickness on InP substrates from openings in the mask. Openings which varied in direction, width and separation were made with E-beam lithography allowing a good dimension control even for nano-sized openings (down to 100 nm wide). This mimics overgrowth of InP on top of SiO2/Si waveguides. By optimizing the growth conditions in terms of growth temperature and partial pressure of the source gases with respect to the opening direction, separation and width, we show that a thin (~200 nm) layer of InP with good morphology and crystalline quality can be grown laterally on top of SiO2. Due to the thin grown InP layer, amplification structures on top of it can be well integrated with the underlying silicon waveguides. The proposed ELOG technology provides a promising integration platform for hybrid InP/silicon active devices.

Integrated silicon nanophotonics: A solution for computer interconnects

To solve the processors performance limitations, new chip-to-chip and on-chip communication needs to be introduced. Optical technology will play here a crucial role. Optical links will move into the chip multiprocessors connecting tens or even hundreds of processing elements and forming a photonic network for communication between them. In this talk we will present our solutions of silicon-based CMOS-compatible optical components for the main building blocks in application to computer interconnects.