Zhiping Yu

Analytical charge-control and I-V model for submicrometer and deep-submicrometer MOSFETs fully comprising quantum mechanical effects

A new analytical current-voltage (I-V) model for submicrometer and deep-submicrometer metal-oxide-semiconductor field-effect transistors (MOSFETs) is developed based on a newly developed charge-control model for the metal-oxide-semiconductor structure. Threshold-voltage shift due to quantum mechanical effects, finite inversion layer thickness effects (inversion layer capacitance), as well as increased depletion layer charge density after the strong inversion point are incorporated in the model. Inversion layer charge density with respect to the gate voltage from depletion through weak inversion to strong inversion regions with smooth transition between different regions is given by one expression. Two-dimensional short channel effects such as channel length modulation, drain-induced barrier lowering, mobility degradation, and carrier velocity saturation, as well as polysilicon depletion effects are included in the I-V model. Model results are compared with both numerical results of carrier sheet density and surface potential in the channel, and experimental results of I-V data for submicrometer and deep-submicrometer MOSFETs down to 0.09-/spl mu/m effective gate length and the accuracy of the model are demonstrated.

Statistical analysis of full-chip leakage power considering junction tunneling leakage

In this paper we address the the growing issue of junction tunneling leakage (Ijunc) at the circuit level. Specifically, we develop a fast approach to analyze the state-dependent total leakage power of a large circuit block, considering Ijunc, sub-threshold leakage (Isub), and gate oxide leakage (Igate). We then propose our algorithm to estimate the full-chip leakage power with consideration of both Gaussian and non- Gaussian parameter distributions, capturing spatial correlations using a grid-based model. Experiments on ISCAS85 benchmarks demonstrate that the estimated results are very accurate and efficient. For a circuit with G gates, the complexity of our approach is O(G).

Compact model and projection of silicon nanowire tunneling transistors (NW-tFETs)

We present in this paper a basic compact model incorporating several key physical mechanisms in nanowire tunneling field-effect transistors (NW-tFETs), such as non-constant subthreshold swing (SS), definition of an on voltage, ballistic transport for carriers in the channel, and quantum capacitance limit (QCL). Using experimental data from [1], the validity of this model is verified. Further, to project the performance of ultra-scaled silicon NW-tFETs, we compare the state-of-the-art gate-all-around (GAA) NW MOSFETs [2] with modeling results for the same NW diameter and EOT (effective oxide thickness). It is concluded that ultra-scaled NW-tFETs can achieve high performance with low subthreshold swing (SS) and nearly the same on current as in MOSFETs.

An Extension to Newton's Method in Device Simulators--On An Efficient Algorithm to Evaluate Small-Signal Parameters and to Predict Initial Guess

The Newton iteration method used in conventional numerical device simulations is extended to include bias conditions as variable parameters in the system of semiconductor equations. This extension leads to a very simple algorithm to evaluate low-frequency, small-signal parameters based on dc solutions. It also provides an elegant way to project an initial guess for subsequent bias conditions. Rigorous mathematical derivation and applications to the evaluation of junction capacitance and breakdown voltage are given. The initial guess projection is also illustrated through examples.

Design of complementary GAA-NW tunneling-FETs of axial Si-Ge heterostructure

With sub-16nm CMOS nodes looming, this work proposes a novel device structure for Gate-All-Around (GAA), Nanowire (NW) tunneling-FET (tFET), with axial heterojunction on the source-channel junction, gate-underlap on the drain end of the channel, and optimized doping levels of source and drain. This structure successfully suppresses the undesirable ambipolar transfer characteristics of conventional tFETs, while maintaining the advantage of small subthreshold swing of less than 60mV/dec. For the first time, an all-tFET inverter is demonstrated to exhibit excellent switching behaviors, out-performing both the homojunction Si NW-tFET and the conventional CMOS in inverters with the same gate length and supply voltage.

Core-shell type of tunneling nanowire FETs for large driving current with unipolarity

A radial-heterojunction (HJ), as opposed to axial-HJ, tunneling-FET (tFET) is proposed to increase the driving current as much as 4 times while maintaining steep subthreshold swing (SS) and non-ambipolarity (i.e., unipolar transfer characteristics). The core/shell nanowire is adopted for the bulk of the device, with source region in the core of the wire and shell for the channel. The tunneling thus occurs in the radial direction, increasing the junction area substantially and leading to large on current. The core-shell junction is made of Ge-Si, and a lightly-doped drain-extension is used to suppress ambipolarity, which impedes the application of many types of tunneling devices in digital circuits. Comparison with unipolar axial-HJ GAA NW-tFET is made to show the advantage of the radial structure.

A Robust Novel Technique for SPICE Simulation of ESD Snapback Characteristic

This paper presents a robust and novel technique for the circuit simulation of ESD (electrostatic discharge) snapback characteristic. A new linearization scheme for the avalanche current model in ESD evaluation shows a good convergence behavior during ESD stress simulation. This technique is compatible with the traditional circuit simulator based on the modified nodal analysis (MNA) like SPICE. We have implemented a simple ESD MOSFET model in SPICE3f5, and the simulation results are discussed

Passive-assured rational function approach for compact modeling of on-chip passive components

An efficient rational function modeling approach of on-chip passive components, especially spiral inductors, is presented. In addition to the minimal number of model coefficients compared to the currently available approaches, two major features of the methodology are: 1) automatic generation of the equivalent circuit based on the rational function, and 2) guaranteed passivity of the network generated. The latter is achieved by applying a novel local-compensation technique in the frequency domain to the direct mapping of the rational function fit. The additional error incurred by this local correction is negligible in terms of the extracted components characteristics such as effective inductance and quality factor, Q. The detailed algorithm of the technique is described and the results from the application of the method to a two-port spiral inductor are presented.

A Novel Algorithm for Improving Convergence Behavior of Circuit Simulators

A novel algorithm based on the Newton projection scheme [1] is proposed to improve the convergence behavior of circuit simulation. The computation experiment shows that the number of iterations to achieve convergence in Newton-Raphson method can be cut by as much as twenty nine-fold, and the convergence behavior of the Newton iteration is made much more robust using this algorithm. Moreover, the implementation of the proposed algorithm in conventional circuit simulators such as SPICE is very easily done. Both the theoretical background and actual implementation of the algorithm are discussed. The experimental circuit and simulation results are also shown.

Efficient tail estimation for massive correlated log-normal sums: with applications in statistical leakage analysis

Existing approaches to statistical leakage analysis focus only on calculating the mean and variance of the total leakage. In practice, however, what concerns most is the tail behavior of the sum distribution, as it tells that to what extent the design will be safe or reliable. However, computing the tail distribution is much more difficult than computing the mean and variance. In this paper, we tackle this problem by making use of the recent developments in the area of financial and insurance analysis, as well as the fast evaluation algorithm for the variance of spatially correlated random sums. The proposed algorithm is provably of O(N) complexity. Experiments show that the algorithm provides 1% accuracy in modeling the tail behavior and it is 10X more accurate compared with existing methods that approximate the distribution by matching the moments of a lognormal distribution.