Zhuo Cheng

Scheduling overload for real-time systems using SMT solver

In a real-time system, tasks are required to be completed before their deadlines. Due to heavy workload, the system may be in overload condition under which some tasks may miss their deadlines. To alleviate the degrees of system performance degradation cased by the missed deadline tasks, the design of scheduling is crucial. Many design objectives can be considered. In this paper, we focus on maximizing the total number of tasks that can be completed before their deadlines. A scheduling method based on satisfiability modulo theories (SMT) is proposed. In the method, the problem of scheduling is treated as a satisfiability problem. The key work is to formalize the satisfiability problem using first-order language. After the formalization, a SMT solver (e.g., Z3, Yices) is employed to solver such a satisfiability problem. An optimal schedule can be generated based on a solution model returned by the SMT solver. The correctness of this method and the optimality of the generated schedule are straightforward. The time efficiency of the proposed method is demonstrated through various simulations. To the best of our knowledge, it is the first time introducing SMT to solve overload problem in real-time scheduling domain.

SMT-based scheduling for multiprocessor real-time systems

Real-time system is playing an important role in our society. For such a system, sensitivity to timing is the central feature of system behaviors, which means tasks in the system are required to be completed before their deadlines. Currently, almost all the practical real-time systems are equipped within multiple processors, for which the schedule synthesis to make sure that all the tasks can be completed before their deadlines is known to be an NP complete problem. In this paper, to solve the scheduling problem, we propose a scheduling method based on satisfiability modulo theories (SMT). In the method, the problem of scheduling is treated as a satisfiability problem. The key work is to formalize the satisfiability problem using first-order language. After the formalization, a SMT solver (e.g., Z3, Yices) is employed to solve such a satisfiability problem. An optimal schedule can be generated based on a solution model returned by the SMT solver. Moreover, in the SMT-based scheduling method, we define the scheduling constraints as system constraints and target constraints. Such design makes the proposed method apply more widely compared with existing methods.

Design and evaluation of hybrid temperature control for cyber-physical home systems

The design of control systems is crucial for improving the comfort level of the home environment. Cyber-physical systems (CPSs) can offer numerous opportunities to design highly efficient control systems. In this paper, we focus on the design and evaluation of temperature control systems. By using the idea of CPS, a hybrid temperature control (HTC) system is proposed. Through an energy efficient temperature control (EETC) algorithm, the HTC system maintains the room temperature in the desired interval. In the tight integration of physical and cyber worlds, the sensing accuracy of the physical platform has significant impact on the performance of the HTC system. Through simulations and field experiments, the relationship between control performance and sensing accuracy is captured. A fitting function method is proposed to improve the sensing accuracy without increasing the monetary cost of the system implementation. By using this method, the performance of the HTC system can be increased significantly.

DPSC: A Novel Scheduling Strategy for Overloaded Real-Time Systems

For real-time systems, the correctness of system behavior depends on not only the computed results but also on the time at which results are produced. This requires tasks in such systems to be completed before their deadlines. However, when workload is heavy, the system may become overloaded. Under such condition, some tasks may miss their deadlines. When this problem happens, it is important to minimize the degrees of system performance degradation. To achieve this objective, the design of scheduling algorithm is crucial. In this paper, we focus on designing on-line scheduling algorithm to maximize the total number of tasks that meet their deadlines. The idea of dynamic programming is used to present a dynamic programming scheduling (DPS) algorithm. In each time, DPS makes an optimum choice for currently known task set. As the uncertainty of new arriving tasks, DPS cannot make optimum choice for the set of overall tasks. To deal with this uncertainty, by applying a congestion control mechanism, a dynamic programming scheduling with congestion control (DPSC) is introduced. Three widely used scheduling algorithms and their corresponding deferrable scheduling (DS) methods are discussed and compared with DPSC. Simulation results reveal that DPSC can effectively improve system performance.

Poster: An Efficient Approach for Verifying Automobile Distributed Application Systems on Timing Property

OSEK/VDX is a specification for vehicle-mounted systems and has been widely adopted by automotive companies to develop a distributed application system. However, the ever increasing complexity of the distributed application system has created a challenge for ensuring the reliability in exhaustive way. Model checking has been proposed as a promising technique to exhaustively verify OSEK/VDX distributed application systems such as timing properties, but faces a poor scalability for practicality. In this paper, we address this problem by proposing an efficient approach to simplify the finite state model derived from an OSEK/VDX distributed application system into a level where model checking can be easily applied. We evaluate our approach with a series of experiments based on the model checker UPPAAL. The experimental results show that our approach is not only capable of efficiently simplifying the models of the OSEK/VDX distributed application systems, but also of making model checker UPPAAL competent in dealing with the OSEK/VDX distributed application systems with industrial complexity.

Verifying OSEK/VDX automotive applications: A Spin‐based model checking approach

OSEK/VDX, a development standard for automobiles, has now been widely adopted by automotive manufacturers for developing a vehicle‐mounted system. The ever increasing complexity of the system has created a challenge for ensuring the reliability of the developed OSEK/VDX applications in exhaustive way. Model checking as an exhaustive verification technique has attracted much attention in the automotive industry. To check OSEK/VDX applications by using model checking verification techniques, we have proposed a method based on SMT‐based bounded model checking. However, the method performs a poor efficiency in checking the OSEK/VDX applications that hold many loops, especially it is unable to deal with interruptions. In this paper, to apply model checking verification techniques to check a practical OSEK/VDX application, we develop and investigate an alterative approach based on the well‐known model checker Spin. In our Spin‐based approach, interruptions are taken into account, and moreover, 2 optimization strategies are used to boost the scalability and efficiency of the approach by reducing state space and accelerating bug detection. We have investigated the Spin‐based approach based on a series of experiments. The experimental results show that the approach is an impactful technique to verify the developed OSEK/VDX applications that hold a number of loops and interruptions.

autoC: an efficient translator for model checking deterministic scheduler based OSEK/VDX applications

The OSEK/VDX automotive OS standard has been widely adopted by many automobile manufacturers, such as BMW and TOYOTA, as the basis for designing and implementing a vehicle-mounted OS. With the increasing functionalities in vehicles, more and more multi-task applications are developed based on the OSEK/VDX OS. Currently, ensuring the reliability of the developed applications is becoming a challenge for developers. As to ensure the reliability of OSEK/VDX applications, model checking as a potential solution has attracted great attention in the automotive industry. However, existing model checkers are often unable to verify a large-scale OSEK/VDX application that consists of many tasks, since the corresponding application model too complex. To make existing model checkers more scalable in verifying large-scale OSEK/VDX applications, we describe a software tool named autoC to tackle this problem by automatically translating a multi-task OSEK/VDX application into an equivalent sequential model. We conducted a series of experiments to evaluate the efficiency of autoC. The experimental results show that autoC is not only capable of efficiently sequentializing OSEK/VDX applications, but also of improving the scalability and efficiency of existing model checkers in verifying large-scale OSEK/VDX applications.

Evaluation of redundancy-based system: a model checking approach

1Institute of Technology Innovation, Hefei Institutes of Physical Science, Chinese Academy of Sciences, Hefei 230088, China; 2School of Computing, Teesside University, Middlesbrough TS1 3BX, United Kingdom; 3State International S&T Cooperation Base of Networked Supporting Software, Jiangxi Normal University, Nanchang 330022, China; 4School of Software, Shanghai Jiao Tong University, Shanghai 200240, China

SOFL-based dependency graph generation for scheduling

In multi-task systems, different tasks work together to achieve desired functions. To guarantee the correctness of the functions, the tasks are required to be completed in specific orders. Violation of such orders will lead to the systems in unpredictable states, which may cause disasters. However, with the continuously increasing complexity in the developments of systems, to correctly generate the task dependency relation is becoming a challenge. A primary problem is the requirement specification may not be accurately and easily understood by the developers carrying out different tasks. To solve this problem, formal specification provides a feasible solution. However, some difficulties (e.g., high requirement of significant abstraction and mathematical skills) has hindered the widely usage of formal methods. To address these difficulties, SOFL, a formal engineering methodology, has been proposed. In this paper, we propose a method for generating task dependency relation based on SOFL specification. This method is demonstrated through a detailed case study of cruise control system. Moreover, we also provide a checking algorithm to check if there exist mistakes in the SOFL specification based on the transitivity of task dependency relation. We believe that these works provide a firm basis for the design of scheduling.

Verifying OSEK/VDX applications: An optimized SMT-based bounded model checking approach

OSEK/VDX, a standard of automobile OS, has been widely adopted by many manufacturers to design and implement a vehicle-mounted OS. Currently, with increasing functionalities in vehicles, more and more complex applications are developed based on the OSEK/VDX OS. However, how to ensure the reliability of developed applications is becoming a challenge for developers. Based on our previous work, in this paper we present an efficient approach to verify the developed OSEK/VDX applications. In the presented approach, SMT-based bounded model checking technique is used to carry out verification in order to handle complex applications. Moreover, a series of optimization strategies are proposed and employed to improve the checking capability of our approach. We have implemented a tool according to the proposed approach and conducted many experiments. The experiment results show that our approach is capable of checking the safety property of large-scale OSEK/VDX applications. We also compared our approach with existing checking method, the comparison results indicate that our approach is an efficient and powerful technique in verifying OSEK/VDX applications.