A. Boccardi

Transverse impendance of LHC collimators

The transverse impedance in the LHC is expected to be dominated by the numerous collimators, most of which are made of Fibre-Reinforced-Carbon to withstand the impacts of high intensity proton beams in case of failures, and which will be moved very close to the beam, with full gaps of few millimetres, in order to protect surrounding super-conducting equipments. We present an estimate of the transverse resistive-wall impedance of the LHC collimators, the total impedance in the LHC at injection and top energy, the induced coupled-bunch growth rates and tune shifts, and finally the result of the comparison of the theoretical predictions with measurements performed in 2004 and 2006 on a prototype collimator installed in the SPS.

The FPGA-based continuous FFT tune measurement system for the LHC and its test at the CERN SPS

A base band tune (BBQ) measurement system has recently been developed at CERN based on a high- sensitivity direct-diode detection technique followed by a high resolution FFT algorithm implemented in an FPGA. The FPGA based digital processing allows the acquisition of continuous real-time spectra with 32-bit resolution, while a digital frequency synthesiser (DFS) can provide acquisition synchronised chirp excitation. All the implemented algorithms support dynamic reconfiguration of processing and excitation parameters. Results from both laboratory measurements and tests performed with beam at the CERN SPS will be presented.

The silicon pixel detector (SPD) for the ALICE experiment

The ALICE silicon pixel detector (SPD) constitutes the two innermost layers of the inner tracking system (ITS). The basic building block of the SPD is the half-stave carrying two detector ladders. The half-stave is equipped with a multi-chip module (MCM) and an optical fibre link for control and readout. A 5-layer aluminium/polyimide bus ensures the distribution of power and signals on each half-stave. The half-staves are mounted on a light-weight carbon-fibre structure with an integrated evaporative cooling system. An overview of the SPD development and the current status of the construction are presented.

The Assembly of the first Sector of the ALICE Silicon Pixel Detector

The Silicon Pixel Detector (SPD) is the innermost part of the Inner Tracking System (ITS) of the ALICE experiment at LHC. 240 detector ladders containing in total about 10 million pixel cells with dimension 50 × 425 µm2, have to be assembled on a carbon fibre support. The mounting procedure of the basic SPD modules (Half-Staves) and the assembly of the barrel sectors are presented. Results on the assembly of the first sector are reported.

The ALICE silicon pixel detector: electronics system integration

The ALICE silicon pixel detector (SPD) comprises the two innermost layers of the ALICE inner tracker system. The SPD includes 120 half staves each consisting of 10 ALICE pixel chips bump bonded to two silicon sensors and one multi-chip read-out module. Each pixel chip contains 8192 active cells, so that the total number of pixel cells in the SPD is ap107. The on-detector read-out is based on a multi-chip-module containing 4 ASICs and an optical transceiver module. The constraints on material budget detector module dimensions are very demanding

Integration and test of the ALICE SPD readout chain

The silicon pixel detector (SPD) is the innermost element of the ALICE inner tracking system (ITS). The on-detector electronic system consists of several ASICs in a commercial 0.25μm CMOS process (radiationhardened by design), a low-mass multi layer Kapton cable for power and signal distribution (pixel bus), and a multi-chip module that includes a custom designed, very compact optical transceiver. The control and readout data transmission is done via optical fibres. Prototypes of the full read-out chain have been produced and tested. Integration issues and test results are presented and discussed.

Influence of varying tune width on the robustness of the LHC tune PLL and its application for continuous chromaticity measurement

Tune and chromaticity measurement is an integral part of safe and reliable LHC operation. Tight tolerances on the maximum transverse beam excursions allow oscillation amplitudes of less than 30 mum. This leaves only a small margin for transverse beam and momentum excitations required for measuring tune and chromaticity. This contribution discusses a robust tune phase-locked-loop (PLL) operation in the presence of non-linearities and varying chromaticity. The loop design was tested at the SPS, using the LHC PLL prototype system. The system was also used to continuously measure tune width and chromaticity, using resonant transverse excitations of the tune side-slopes.

Beam Test Performance and Simulation of Prototypes for the ALICE Silicon Pixel Detector

The silicon pixel detector (SPD) of the ALICE experiment in preparation at the Large Hadron Collider (LHC) at CERN is designed to provide the precise vertex reconstruction needed for measuring heavy flavor production in heavy ion collisions at very high energies and high multiplicity. The SPD forms the innermost part of the Inner Tracking System (ITS) which also includes silicon drift and silicon strip detectors. Single assembly prototypes of the ALICE SPD have been tested at the CERN SPS using high energy proton/pion beams in 2002 and 2003. We report on the experimental determination of the spatial precision. We also report on the first combined beam test with prototypes of the other ITS silicon detector technologies at the CERN SPS in November 2004. The issue of SPD simulation is briefly discussed.

Performance of the AWAKE Proton Beam Line Beam Position Measurement System at CERN

The Advanced Proton Driven Plasma Wakefield Acceleration Experiment (AWAKE), based at CERN, explores the use of a proton driven plasma wake-field to accelerate electrons at high energies over short distances. This paper introduces the Beam Position Measurement (BPM) system of the proton beamline and its performance. This BPM system is composed of 21 dual plane button pickups distributed along the 700m long transfer line from the CERN Super Proton Synchrotron (SPS) extraction point to beyond the plasma cell. The electrical pulses from the pickups are converted into analogue signals proportional to the displacement of the beam using logarithmic amplifiers, giving the system a high dynamic range (>50 dB). These signals are digitized and processed by an FPGA-based front-end card featuring an ADC sampling at 40MSps. Each time a bunch is detected, the intensity and position data is sent over 1km of copper cable to surface electronics through a serial link at 10Mbps. There, the data is further processed and stored. The dynamic range, resolution, noise and linearity of the system as evaluated from the laboratory and 2016 beam commissioning data will be discussed in detail.

The Giga Bit Transceiver based Expandable Front-End (GEFE)—a new radiation tolerant acquisition system for beam instrumentation

The Giga Bit Transceiver based Expandable Front-End (GEFE) is a multi-purpose FPGA-based radiation tolerant card. It is foreseen to be the new standard FMC carrier for digital front-end applications in the CERN BE-BI group. Its intended use ranges from fast data acquisition systems to slow control installed close to the beamlines, in a radioactive environment exposed to total ionizing doses of up to 750 Gy. This paper introduces the architecture of the GEFE, its features as well as examples of its application in different setups.