A. Cappy

Metamorphic In/sub 0.4/Al/sub 0.6/As/In/sub 0.4/Ga/sub 0.6/As HEMTs on GaAs substrate

New In/sub 0.4/Al/sub 0.6/As/In/sub 0.4/Ga/sub 0.6/As metamorphic (MM) high electron mobility transistors (HEMTs) have been successfully fabricated on GaAs substrate with T-shaped gate lengths varying from 0.1 to 0.25 /spl mu/m. The Schottky characteristics are a forward turn-on voltage of 0.7 V and a gate breakdown voltage of -10.5 V. These new MM-HEMTs exhibit typical drain currents of 600 mA/mm and extrinsic transconductance superior to 720 mS/mm. An extrinsic current cutoff frequency f/sub T/ of 195 GHz is achieved with the 0.1-/spl mu/m gate length device. These results are the first reported for In/sub 0.4/Al/sub 0.6/As/In/sub 0.4/Ga/sub 0.6/As MM-HEMTs on GaAs substrate.

Imaging electron wave functions inside open quantum rings

Combining scanning gate microscopy (SGM) experiments and simulations, we demonstrate low temperature imaging of the electron probability density |Psi|(2)(x,y) in embedded mesoscopic quantum rings. The tip-induced conductance modulations share the same temperature dependence as the Aharonov-Bohm effect, indicating that they originate from electron wave function interferences. Simulations of both |Psi|(2)(x,y) and SGM conductance maps reproduce the main experimental observations and link fringes in SGM images to |Psi|(2)(x,y).

Fabrication and characterization of 100-nm In/sub 0.53/Ga/sub 0.47/As-In/sub 0.52/Al/sub 0.48/As double-gate HEMTs with two separate gate controls

In this letter, we demonstrate successful operation of 100-nm T-gates double-gate high electron mobility transistors with two separate gate controls (V/sub g1s/ /spl ne/ V/sub g2s/). These devices are fabricated by means of adhesive bonding technique using enzocyclocbutene polymer. The additional gate enables the variation of the threshold voltage V/sub th/ in a wide range from -0.68 to -0.12V while keeping high cutoff frequency f/sub t/ of about 170 GHz and high maximum oscillation frequency f/sub max/ of about 200 GHz. These devices are considered as being very effective for millimeter-wave mixing applications and are promising devices for the fabrication of velocity modulation transistor (VMT) (Sakaki et al., 1982).

Design and realization of sub 100 nm gate length HEMTs

Standard layer structure InAlAs/InGaAs/EnP designed for 100 nanometer gate length High Electron Mobility Transistors (HEMTs) become inadequate, if we reduce the gate length under 100 nm. An InAlAs/InGaAs/InP layer structure optimized for 50 nanometer gate length HEMTs has been realized. DC and microwave characteristics are reported on HEMTs realized on a standard layer and an optimized layer, with similar gate length. Comparable cutoff frequencies f/sub T/ are obtained for both devices. The main result is a large improvement of maximum oscillation frequency f/sub max/, which is 260 GHz and 470 GHz for respectively the standard and the optimized devices. This behavior is attributed to the reduction of short channel effects.

(Cl2:Ar) ICP/RIE Dry Etching of Al(Ga) Sb FOR AlSb/InAs HEMTs

Dry etching of AlSb and Al_0.80Ga_0.20Sb has been performed by inductively coupled plasma/reactive ion etching based on a (Cl₂:Ar) gas mixture without addition of BCI₃. The dry etch process has been used to fabricate AlSb/InAs high electron mobility transistors isolated by a shallow mesa. Good DC/RF results, with extrinsic f_T/f_max= 135/105 GHz, have been measured for a 2times50 mum HEMT with a gate length of 295 nm.

Theoretical and experimental characterization of Y-branch nanojunction rectifier up to 94 GHz

A double Y-branch ballistic junction is proposed for rectification of signals up to 94 GHz. A nonlinear model is developed to predict the frequency dependence of its RF to DC conversion performances, and agrees very well with experiment. The model shows the importance of minimizing extrinsic parasitics when designing HF ballistic nanodevices.

Improvement of the high frequency performance of HEMTs by bufferless technology

By means of a 2D Monte Carlo simulation of 50-nm-gate lattice matched AlInAs/InGaAs HEMTs, we show the benefits of using bufferless technology in terms of improvement of the cutoff frequency and noise characteristics. We have found an increase of approximately a 15% in f/sub c/, f/sub t/ and f/sub max/. Moreover, though only a slight reduction of 0.2 dB in the minimum noise figure is obtained, the bufferless HEMT shows an important decrease of the noise resistance (almost 5 /spl Omega/) and a 2.3 dB increase of the associated gain at 94 GHz.

0.06 /spl mu/m gate length metamorphic In/sub 0.52/Al/sub 0.48/As/In/sub 0.53/Ga/sub 0.47/As HEMTs on GaAs with high f/sub T/ and f/sub MAX/

State-of-the art metamorphic In/sub 0.52/Al/sub 0.48/As/In/sub 0.53/Ga/sub 0.47/As HEMTs on a GaAs substrate with 60 nanometer gate length is reported. The DC and microwave performance were investigated. Typical drain-to-source current Ids of 600 mA/mm and extrinsic transconductance of 850 mS/mm were obtained with our devices. Cutoff frequency f/sub T/ and maximum oscillation frequency f/sub max/ are 260 GHz and 490 GHz respectively. To our knowledge, these frequency performances are the highest ever reported for HEMTs on GaAs substrate.

Experimental investigation of stochastic resonance in a 65nm CMOS artificial neuron

This work proposes an experimental demonstration of the stochastic resonance, a phenomenon widely observed in biology using a 65 nm CMOS artificial neuron. The stochastic resonance has been revealed through two different statistical studies. Moreover, when optimal, a signal to noise ratio at the output of the artificial neuron of 22.4 dB is achieved, for an ultra low power consumption, lower than 60 pW.

Ultra low power analog design and technology for artificial neurons

In a context of the end of Moores law, energy dissipation constitutes a real challenge. Among the new energy efficient paradigms for data processing, bio-inspired computing is very promising, moreover introducing cognitive characteristics. As applications at very high scale are addressed, the size and energy dissipation of both the neuron and synapse cells needs to be minimized. In this context, this paper presents the design of an original artificial neuron, using standard 65nm CMOS technology with optimized energy efficiency and its application in basic neural networks. By recalling brain and neuron features, it is shown why neuron energy efficiency is roughly limited to 1 pJ/spike in biological neuron. Biological and artificial neurons features are carefully compared, highlighting the importance of downscaling. The artificial neuron circuit presented was designed to exhibit wide band spiking frequencies, targeting large scale bio-inspired information processing applications. The most important feature of the fabricated circuits is the neuron energy efficiency in the few fJ/spike range, which improves prior state-of-the-art by two to three orders of magnitude. This performance is achieved by minimizing two key parameters: the supply voltage and the related membrane capacitance. Meanwhile, the obtained standby power at a resting output does not exceed tens of picowatts. The circuit is sized to 35μm2, reaching a spiking output frequency of 26kHz. It is then shown how this artificial technology has already been used for two applications: (i) emulation of bursting mode, important in brain stimulation context or for robotics (locomotion rhythm), (ii) stochastic resonance application, useful to detect an electrical signal buried in noise, phenomena exploited in nature by species. These results already allow envisioning the development of highly integrated neuro-processors (vision application). A variant circuit (biomimetic) could be used for robotics, neuroscience or medical applications.