A. Chovet

Electrical characterization of metal-oxide-InP tunnel diodes based on current-voltage, admittance and low frequency noise measurements

Abstract Electrical properties of metal-oxide-InP tunnel diodes, based on combined d.c. transport, admittance and low frequency noise measurements, are reported. They appear to be strongly dominated by interfacial nonuniformities, which are related to a nonuniform distribution of trapping centers across the contact area. It is demonstrated that low frequency noise measurements give details on the spatial distribution of interfacial defect traps within the oxide thickness and across the diode section, and therefore can provide an effective qualification of the uniformity of the passivation of the semiconductor surface.

Low-frequency noise sources in polysilicon emitter BJT's: influence of hot-electron-induced degradation and post-stress recovery

The noise properties of polysilicon emitter bipolar transistors are studied. The influences of the various chemical treatments and annealing temperatures, prior and after polysilicon deposition, on the noise magnitude are shown. The impact of hot-electron-induced degradation and post-stress recovery on the base and collector current fluctuations are also investigated in order to determine the main noise sources of these devices and to gain insight into the physical mechanisms involved in these processes. >

Flicker noise by random walk of electrons at the interface in nonideal Schottky diodes

Abstract An explanation of low frequency 1/f noise in nonideal Schottky barrier diodes is presented where the current fluctuation is attributed to the random walk of electrons at the metal-semiconductor interface via modulation of the barrier height. The experimental results on TiN/n-Si Schottky diodes have been successfully analysed to give useful information on the interface states.

Highly sensitive Hall sensors

High-performance InGaAs/InAlAs/InP Hall sensors with high magnetic sensitivity, good linearity, low temperature coefficient and high resolution are reported. These sensors use the properties of a two-dimensional electron gas and the benefit of pseudomorphic material, in which both the alloy composition and the built-in strain offer additional degrees of freedom for band structure tailoring. With the described growth optimization of pseudomorphic heterostructures by molecular beam epitaxy, a high electron mobility of 13 000 at room temperature has been obtained. A physical model of the structure including a self-consistent description of the coupled Schrodinger and Poisson equations has been developed to better understand the influence of the design of the heterostructure on its electronic properties. These results have been used in order to optimize the structure design. A magnetic sensitivity of with a temperature coefficient of between and has been obtained, and high signal-to-noise ratios corresponding to minimal magnetic field of at 100 Hz and at 1 kHz have been measured.

On 1/fγ noise in semiconductor devices

Abstract Applying a thermal activation model, we show that the power index γ of low frequency noise(1/ f γ ) in semiconductor structures can often be directly related to the ratio of thermal energy and a characteristic energy of the trap distribution, when there is a significant band tail or band bending. Some examples are discussed.

Non-homogeneous electrical transport through silicon-on-sapphire thin films: Evidence of the internal stress influence

The non-homogeneous electrical parameters of carrier transport in silicon on sapphire (SOS) films are investigated through galvanomagnetic experiments using “MOS-Hall” thin (0.65 μm) SOS devices with low n-type dopings (n0 ⋍ 1015 to 1016 cm−3). Capacitance-voltage (C-V), Hall and magnetoresistance measurements are performed on the gate-controlled depleted or “active” layers of the film. Experimental results and theoretical calculations show that longitudinal magnetoresistance (LMR) measurements yield the accurate determination of anisotropy and carrier drift mobility. On the contrary, it is underlined that the (previous) characterization methods, exclusively based on C-V or Hall experiments could produce inconsistent and misleading results in SOS. This is partly due to the fact that the usual 6 valley conduction band model used for bulk silicon is no longer valid in thin SOS films, for which the high stress at Si-sapphire interface requires the adoption of a 4 valley model throughout the film; this implies a high anisotropy for carrier mobility and explains why, in SOS films, the Hall mobility is 40% lower than the drift mobility, and the LMR is higher than the transverse magnetoresistance. C-V, Hall and LMR measurements then give fully consistent results allowing one to describe the variation of the carrier scattering mechanisms across the film and to determine the exact profiles for carrier mobilities and concentration as well as for the anisotropy coefficient.

Improved characterization of fully-depleted SOI wafers by pseudo-MOS transistor

Abstract The pseudo-MOS transistor technique is used for quick, quasi-non destructive evaluation and comparison of several types of SOI wafers: SIMOX from different origins and wafer bonding. The effective mobility for electrons and holes, threshold voltages, film doping, interface state density and series resistances are extracted as a function of probes pressure (15–50 g). The form factor of the pseudo-MOS is accurately evaluated by comparison with four-point probe measurement taking into account the correction induced by series resistances.

A physical analysis of drain current transients at low drain voltage in thin film SOI MOSFETs

Abstract This paper shows that drain current transients (overshoots) related to floating body effects or unexpected impact ionization can occur in partially-depleted thin-film SOI MOSFETs at low drain voltage when pulsing one or both of the gates. Hot-carrier degradation has to be associated to such transients. The overshoot of the drain current has been investigated as a function of the front and back gate biases. The use of the reverse Zerbst-type experiment for buried oxide interface state evaluation is also presented.

Interface coupling effects in thin silicon-on-insulator MOSFET's

Abstract Several experiments converge to demonstrate the strong variation of the front channel properties with the substrate bias in thin film SOI-MOS structures. A model is proposed to explain the deformation of the transconductance shape and the variation of its maximum. A related second order effect consists in the modification of the effective channel length. It is also shown that the majority or minority carrier reservoirs existing at the buried interface are responsible for the perturbation of the front channel charge pumping effect. The influence of the interface coupling on other phenomena (low-frequency noise, parasitic conduction on the edges of the Si island and formation of back interface defects) is discussed.

Theory and applications of 1/ƒ trapping noise in MOSFETs for the whole biasing ranges

The 1/ƒ noise theory for MOSFETs biased from weak to strong inversion is developed for the whole range of drain bias. The theory, which explicitly gives the relative drain current spectral density SID/ID2 as a function of drain and gate biases, agrees well with experiment. In particular, it can be used to explain the experimental behaviour at strong inversion in the sub-saturation and saturation regions; in this last case, SID/ID2 is approximately constant with the drain voltage when the gate voltage is fixed. Using this theory, several parameters of the MOSFET (such as threshold voltage, capacitance ratio, trap density, etc.) can be determined by 1/ƒ noise measurement.