A. Fontserè

Analysis of the AlGaN/GaN vertical bulk current on Si, sapphire, and free-standing GaN substrates

The vertical bulk (drain-bulk) current (Idb) properties of analogous AlGaN/GaN hetero-structures molecular beam epitaxially grown on silicon, sapphire, and free-standing GaN (FS-GaN) have been evaluated in this paper. The experimental Idb (25–300 °C) have been well reproduced with physical models based on a combination of Poole-Frenkel (trap assisted) and hopping (resistive) conduction mechanisms. The thermal activation energies (Ea), the (soft or destructive) vertical breakdown voltage (VB), and the effect of inverting the drain-bulk polarity have also been comparatively investigated. GaN-on-FS-GaN appears to adhere to the resistive mechanism (Ea = 0.35 eV at T = 25–300 °C; VB = 840 V), GaN-on-sapphire follows the trap assisted mechanism (Ea = 2.5 eV at T > 265 °C; VB > 1100 V), and the GaN-on-Si is well reproduced with a combination of the two mechanisms (Ea = 0.35 eV at T > 150 °C; VB = 420 V). Finally, the relationship between the vertical bulk current and the lateral AlGaN/GaN transistor leakage curr...

Micro and nano analysis of 0.2 Ω mm Ti/Al/Ni/Au ohmic contact to AlGaN/GaN

As GaN technology continues to gain popularity, it is necessary to control the ohmic contact properties and to improve device consistency across the whole wafer. In this paper, we use a range of submicron characterization tools to understand the conduction mechanisms through the AlGaN/GaN ohmic contact. Our results suggest that there is a direct path for electron flow between the two dimensional electron gas and the contact pad. The estimated area of these highly conductive pillars is around 5% of the total contact area.

Gate current analysis of AlGaN/GaN on silicon heterojunction transistors at the nanoscale

The gate leakage current of AlGaN/GaN (on silicon) high electron mobility transistor (HEMT) is investigated at the micro and nanoscale. The gate current dependence (25–310 °C) on the temperature is used to identify the potential conduction mechanisms, as trap assisted tunneling or field emission. The conductive atomic force microscopy investigation of the HEMT surface has revealed some correlation between the topography and the leakage current, which is analyzed in detail. The effect of introducing a thin dielectric in the gate is also discussed in the micro and the nanoscale.

Nanoscale investigation of AlGaN/GaN-on-Si high electron mobility transistors

AlGaN/GaN HEMTs are devices which are strongly influenced by surface properties such as donor states, roughness or any kind of inhomogeneity. The electron gas is only a few nanometers away from the surface and the transistor forward and reverse currents are considerably affected by any variation of surface property within the atomic scale. Consequently, we have used the technique known as conductive AFM (CAFM) to perform electrical characterization at the nanoscale. The AlGaN/GaN HEMT ohmic (drain and source) and Schottky (gate) contacts were investigated by the CAFM technique. The estimated area of these highly conductive pillars (each of them of approximately 20-50 nm radius) represents around 5% of the total contact area. Analogously, the reverse leakage of the gate Schottky contact at the nanoscale seems to correlate somehow with the topography of the narrow AlGaN barrier regions producing larger currents.

Deposited Thin SiO2 for Gate Oxide on n-Type and p-Type GaN

Here, we report on a comparison of two different methods to achieve thin SiO 2 deposited layers for gate oxide on n- and p-type GaN by using plasma-enhanced chemical vapor deposition with silane (SiH 4 ) and tetraethyl orthosilicate (Si[OC 2 H5] 4 ) precursors. An annealing was performed at 800°C for 2 min in N 2 ambient as an attempt to improve electrical characteristics. Before and after annealing, capacitors were electrical/physically analyzed by capacitance-voltage (C-V), conductance-voltage, current-voltage, optical microscope, scanning electron microscope, atomic force microscope, and secondary-ion mass spectrometry. Globally, the p-type samples presented higher interface state density and rougher surfaces, and in some C-V measurements, it is possible to observe inversion-like characteristics. The surface roughness also increases after annealing. The interfacial trap density for the different SiO 2 /GaN interfaces has been determined. Silane samples exhibit lower D it than TEOS samples. For n-type, annealed SiO 2 from silane has been found as the sample with the lowest D it . The annealing on the SiO 2 from silane samples is not so efficient for the p-type with the D it actually increasing. A discussion on the different diffusion mechanisms in correlation with the electrical results is performed in the last section of this paper.

Gate traps inducing band-bending fluctuations on AlGaN/GaN heterojunction transistors

Here, using a frequency dependent conductance analysis, we map the parallel conductance vs gate bias/frequency and further analyze the slow and fast traps as a function of the Fermi level for different gate architectures of analogous AlGaN/GaN heterojunction transistors with Schottky and SiNx metal-insulator-semiconductor (MIS) gate. The density of interface traps (Dit)-MIS reducing Dit-, the characteristic trap constant and the variance of the band-bending (σs) have been investigated for slow and fast traps. Additional gate stress appears to have a notable effect on the MIS fast trap profile with σs increasing up to 2.5 kT/q.

A HfO 2 based 800V/300°C Au-free AlGaN/GaN-on-Si HEMT technology

Innovative 800V/300°C AlGaN/GaN-on-Si high electron mobility transistors (HEMTs) fabricated with a 4-inch Si CMOS compatible technology are presented in this paper. High performance AlGaN/GaN MIS gated HEMT (MIS-HEMT) and passivated HEMT (i-HEMT) were fabricated using 5nm-thick HfO₂, and 30nm-thick CVD Si₃N₄ as the gate and passivation insulator, respectively. Contact resistance maps yield reduced R_c of 1.32±0.26 Ωmm for Au-free compared to 0.86±0.58 Ωmm for conventional Au-based Ohmic metallization. The off-state breakdown voltage is around 800V with a specific on-resistance of 2 mΩcm². Gate and drain leakage currents as well as dynamic I-V trapping are significantly improved with the MIS-HEMT architecture with almost no trade-off to the on-state.

Temperature impact and analytical modeling of the AlGaN/GaN-on-Si saturation drain current and transconductance

The saturation drain current and the gate saturation transconductance for AlGaN/GaN on silicon (1 1 1) high-electron mobility transistors (HEMTs) have been experimentally investigated in the temperature range of 25–300 °C. An analytical physical-based closed-form is proposed for modeling the gate transconductance taking into account the polar-optical phonon scattering of the electrons in the two-dimensional electron gas HEMT channel. It is suggested that the experimental temperature dependence of T−1.1 is due to the electron channel mobility dependence coupled with the effect of the access resistances and the channel self-heating due to power dissipation.

Temperature behavior and modeling of ohmic contacts to Si+ implanted n-type GaN

The behavior of an ohmic contact to an implanted Si GaN n-well in the temperature range of 25-300 degrees C has been investigated. This is the sort of contact one would expect in many GaN based devices such as (source/drain) in a metal-oxide-semiconductor transistor. A low resistivity ohmic contact was achieved using the metal combination of Ti (350 angstrom)/Al (1150 angstrom) on a protected (SiO(2) cap) and unprotected samples during the post implantation annealing. Sheet resistance of the implanted layer and metal-semiconductor contact resistance to N(+) GaN have been extracted at different temperatures. Both, the experimental sheet resistance and the contact resistance decrease with the temperature and their characteristics are fitted by means of physical based models.

Modelling the metal–semiconductor band structure in implanted ohmic contacts to GaN and SiC

Here we present a method to model the metal–semiconductor (M–S) band structure to an implanted ohmic contact to a wide band gap semiconductor (WBG) such as GaN and SiC. The performance and understanding of the M–S contact to a WBG semiconductor is of great importance as it influences the overall performance of a semiconductor device. In this work we explore in a numerical fashion the ohmic contact properties to a WBG semiconductor taking into account the partial ionization of impurities and analysing its dependence on the temperature, the barrier height, the impurity level band energy and carrier concentration. The effect of the M–S Schottky barrier lowering and the Schottky barrier inhomogeneities are discussed. The model is applied to a fabricated ohmic contact to GaN where the M–S band structure can be completely determined.