A. Fujihara

High-speed InP/InGaAs DHBTs with ballistic collector launcher structure

We demonstrate high-speed InP/InGaAs double-heterojunction bipolar transistors (DHBTs) with significantly improved collector carrier transport. The proposed collector design scheme allows for using moderate collector thickness to achieve high f/sub max/ (/spl sim/300 GHz) while maintaining high f/sub T/ (/spl sim/200 GHz). The DHBTs will meet the demand of ultra-high-speed applications for both high f/sub T/ and high f/sub max/.

High performance 60-GHz coplanar MMIC LNA using InP heterojunction FETs with AlAs/InAs superlattice layer

We describe a 60-GHz coplanar MMIC low-noise amplifier (LNA) using 0.1 /spl mu/m-gate-length InP heterojunction FETs (HJFETs). An optimum gate width of 80 /spl mu/m was determined for the first stage FET by using a small signal model including accurate scaling of the gate resistance. On-wafer noise measurements demonstrated a noise figure of 2.2 dB and a gain of 22.8 dB at 60 GHz.

Electrical properties of InAlAs/InGaAs modulation doped structure after SiN passivated annealing

The effect of thermal annealing on the InAlAs/InGaAs modulation-doped structure, passivated with a SiN film, was investigated. In contrast to the capless sample, the passivated modulation-doped sample exhibited negligible degradation in the two-dimensional electron gas concentration (NS) after annealing at 280 °C, indicating that SiN is an efficient passivation material to ensure good thermal stability for the InAlAs/InGaAs modulation-doped structure. In addition, partial recovery in NS was found by annealing the SiN-passivated sample that had experienced serious NS degradation. A series of secondary ion mass spectroscopy (SIMS) measurements and Hall effect measurements revealed that the recovery of NS is associated with the discharge of fluorine atoms from the Si-doped n-type InAlAs layer.

1.5-V low supply voltage 43-Gb/s delayed flip-flop circuit

This paper reports the first low (1.5 V) supply voltage D-F/F able to run at a full rate of over 43 Gb/s. The proposed F/F circuitry incorporates parallel current switching together with inductive peaking, a combination that makes it suitable for over-43-Gb/s operation at a supply voltage as low as 1.5 V. The D-F/F, implemented through an InP-HBT process, provided 43 Gb/s error free operation with a large clock phase margin of 232 degrees. Moreover, the D-F/F produced a well-opened 50 Gb/s eye diagram. Power dissipation (P/sub diss/) of the D-F/F core circuit was reduced to 40 mW, which is less than one-tenth that of our conventional D-F/F. The F/F circuitry should help enable development of a low-P/sub diss/ 43 Gb/s full-rate module with a 1.5 V range supply voltage, which can be seamlessly connected with high-speed CMOS I/O circuits.

Fluorine diffusion and accumulation in Si step-doped InAlAs layers

The quantitative relation between fluorine (F) accumulation and Si donor concentration in n-InAlAs layers on InP substrate was investigated for several kinds of step-doped InAlAs samples using secondary ion mass spectroscopy. From the depth profile of F and Si donors in a periodic i-/n-InAlAs sample, we found that F accumulates only in n-InAlAs layers, passing through i-InAlAs layers. We also found that the amount of F accumulation in an n-InAlAs layer depends on the Si doping concentration. The experimental results can be explained by considering two states of F. In one state, F is bound to a Si donor and immobile, and in the other it is free and can diffuse.

V-band MMIC LNA using superlattice-inserted InP heterojunction FETs

This paper presents a V-band MMIC low-noise amplifier (LNA) using InP-based heterojunction FETs (HJFETs). While the HJFET utilizes an AlAs/InAs superlattice as well as non-alloyed ohmic contacts for improved reliability, we show that with appropriate epitaxial layer design these device structures do not lead to increase in the source resistance. The three-stage coplanar waveguide circuit design demonstrated a state-of-the-art noise figure of 2.0 dB with 22.1 dB gain at 60 GHz.

Characterization of InP/InGaAs Heterojunction Bipolar Transistors with Carbon-Doped Base Layers Grown by Metal-Organic Chemical Vapor Deposition and Molecular Beam Epitaxy

We characterized InP/InGaAs heterojunction bipolar transistors (HBTs) with carbon-doped InGaAs base layers grown by metal-organic chemical vapor deposition (MOCVD) and molecular beam epitaxy (MBE). Since HBTs grown using these techniques require different processing steps, resulting in different types of process-related damage, we analyzed the bulk and periphery components of DC characteristics to clarify the effects of the crystal growth and process techniques on device characteristics separately. The MBE-grown HBTs were found to have an advantage over the MOCVD-grown HBTs, because they do not require harmful high-temperature annealing during processing steps. On the other hand, it was also shown that the MOCVD-grown HBTs have a significantly lower base recombination rate than the MBE-grown HBTs, making MOCVD a suitable method of growing InP HBTs that do not require annealing, such as that with a GaAsSb base.

Fluorine diffusion in step-doped InAlAs layers on InP substrate

The quantitative relation between fluorine (F) accumulation and Si donor concentration in n-InAlAs layers on InP substrate was investigated for several kinds of step-doped InAlAs samples using secondary ion mass spectroscopy. From the depth profile of F and Si donor in a periodic i-/n-InAlAs sample, we found that F accumulates only in n-InAlAs layers, passing through i-InAlAs layers. Also, we found that the amount of F accumulation in an n-InAlAs layer depends on the Si doping concentration. The experimental results can be explained by considering two states of F. In one state, F is bound to a Si donor and immobile, and in the other it is free and can diffuse.

InP-based heterojunction FET processing for high-reliability millimeter-wave applications

Describes a novel InP-based FET processing technology for high-reliability microwave applications. High performance InAlAs/InGaAs heterojunction FETs (HJFETs) were fabricated using completely molybdenum-based electrode technology (COMET). The fabricated 1 /spl mu/m gate-length COMET-HJFET exhibited excellent DC and RF performance, including a transconductance of 470 mS/mm and a current gain cutoff frequency of 40 GHz. High temperature DC bias tests performed on the COMET device demonstrated improved reliability compared to that for the conventional InP-based HJFET. The superior reliability of the developed COMET-HJFET is attributed to the reduced interdiffusion between metals of the electrodes and semiconductors by introducing a refractory metal of Mo as a barrier metal.

Novel InAlAs/InGaAs heterojunction FETs with modulated indium composition channel and AlAs/InAs superlattice barrier layer

Novel InAlAs/InGaAs heterojunction FETs (HJFETs) with modulated indium composition channels, named CCMTs (Channel Composition Modulated Transistors), have been successfully fabricated, in which an InAs channel is sandwiched by In/sub 0.53/Ga/sub 0.47/As/In/sub 0.8/Ga/sub 0.2/As sub-channels. The channel structure is designed to improve electron transport and electron confinement by increase effective indium content in consideration of channel electron distribution. The fabricated devices also employ an AlAs/InAs superlattice as a barrier layer against impurity contamination for high thermal stability. A 0.2 /spl mu/m T-shaped gate device exhibits gm of 1370 mS/mm, and Ft of 180 GHz at a low drain bias of 1.0 V. In high temperature and DC life test conducted at more than 230/spl deg/C, the devices exhibited less than 3% degradation after 100 hrs, which shows the developed CCMTs with AlAs/InAs superlattice insertion technology can offer high-performance and highly-reliable InP-based HJFETs for various microwave and millimeter-wave applications.