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Dive into the research topics where A. Gutierrez-Aitken is active.

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Featured researches published by A. Gutierrez-Aitken.


ieee gallium arsenide integrated circuit symposium | 2001

Ultra high speed direct digital synthesizer using InP DHBT technology

A. Gutierrez-Aitken; J. Matsui; E.N. Kaneshiro; B.K. Oyama; D. Sawdai; A.K. Oki; D.C. Streit

Direct Digital Synthesizers (DDS) offer advantages such as precise beam shaping and forming over conventional RF approaches. This paper discusses novel design and process techniques that enable direct digital synthesis of S-band output frequencies using our current InP double-heterojunction bipolar transistor (DHBT) technology with a cantilevered base layer and undercut collector. The test results demonstrate a DDS chip operating at the world record clock rate of 9.2 GHz. Further design and process improvements will be implemented in future generation circuits that will enable synthesis of Ku-band frequencies.


international electron devices meeting | 1999

69 GHz frequency divider with a cantilevered base InP DHBT

A. Gutierrez-Aitken; E. Kaneshiro; B. Tang; J. Notthoff; P. Chin; D.C. Streit; A.K. Oki

High speed digital logic is essential in diverse applications such as optical communication, frequency synthesizers, and analog-digital conversion. Current research efforts indicate that technologies utilizing heterojunction bipolar transistors (HBT) are the preferred approach for systems operating at clock frequencies of 40 GHz and above. In this paper we report a novel InAlAs/InGaAs/InP double-HBT (DHBT) with a cantilevered base layer and undercut collector. We fabricated and demonstrated a 69 GHz 2:1 digital frequency divider using this technology, which is, to our knowledge, the fastest divider reported to date in any semiconductor technology.


ieee gallium arsenide integrated circuit symposium | 1999

High linearity K-band InP HBT power amplifier MMIC with 62.8% PAE at 21 GHz

L.W. Yang; K.W. Kobayashi; A.K. Oki; H.C. Yen; P.C. Grossman; T. Block; L.T. Tran; A. Gutierrez-Aitken; L.G. Callejo; J. Macek; S. Maas

We report the first InP HBT MMIC power amplifier chip results at K-band. A 21 GHz fully monolithic 2 mil InP HBT power MMIC which achieves 62.8% PAE with 10 dB gain and 20 dBm output power. A higher power MMIC at 18.5 GHz achieved 25 dBm output power with 40% PAE at 1 dB compression under class AB operation with no noticeable gain expansion. The MMIC has low distortion with 3/sup rd/ order IM suppression C/I of -30.2 dBc and 5th order suppression C/I of -50.8 dBc at a combined output power of 19.3 dBm. Both amplifiers were operated under low DC power with a conservative peak current densities of <35 kA/cm/sup 2/ and a Vce of <3.3 V; showing a potential reliable application in communications.


ieee gallium arsenide integrated circuit symposium | 1998

A low phase noise W-band InP-HBT monolithic push-push VCO

K.W. Kobayashi; J. Cowles; L.T. Tran; A. Gutierrez-Aitken; T. Block; F. Yamada; A.K. Oki; D.C. Streit

This paper reports on what is believed to be the highest frequency bipolar VCO MMIC so far reported. The W-band VCO is based on a push-push oscillator topology which employs InP-HBTs with f/sub T/s and f/sub max/s of 70 and 200 GHz, respectively. The W-band VCO produces a maximum oscillating frequency of 108 GHz and delivers an output power of +0.92 dBm into 50 /spl Omega/. The VCO also obtains a tuning range of 2.73 GHz or 2.6% using a monolithic varactor. A phase noise of -88 dBc/Hz and -109 dBc/Hz is achieved at 1 MHz and 10 MHz offsets, respectively, and is believed to be the lowest phase noise reported for a monolithic W-band VCO. The push-push VCO design approach enables higher VCO frequency operation, lower noise performance, and smaller size which is attractive for MM-wave frequency source applications.


ieee gallium arsenide integrated circuit symposium | 1999

InP DHBT 68 GHz frequency divider

B. Tang; J. Notthoff; A. Gutierrez-Aitken; E. Kaneshiro; P. Chin; A.K. Oki

We report a 68 GHz 2:1 frequency divider with measured input sensitivity less than 6 dBm from 53-68 GHz. To our knowledge, this is the fastest digital frequency divider reported to date in any semiconductor technology. The divider is implemented in differential current mode logic (CML) using undercut collector InP Double Heterojunction Bipolar Transistor (DHBT) technology, with measured f/sub T/ of 150 GHz and f/sub max/ of 163 GHz at J/sub x/=1.2/spl times/10/sup 5/ A/cm/sup 2/. It draws 25.1 mA from a single -3 V supply, dissipating 75 mW. Test results were obtained for wafer probe using micro-coax probes.


The 10th IEEE International Symposium on Electron Devices for Microwave and Optoelectronic Applications | 2002

InP HEMT and HBT technology and applications

D.C. Streit; R. Lai; A.K. Oki; A. Gutierrez-Aitken

InP HEMT and InP HBT offer significant performance advantages for applications that range from microwave and millimeter-wave to fast digital and optoelectronic circuits. The improved transport characteristics, high transconductance, and optical integration properties of these devices hold great benefit for wireless and fiber-optic communications, radar, passive imaging and radiometer systems. We present an overview of recent results for InP devices and integrated circuits, including the current status of TRWs, InP HEMT and HBT device and MMIC performance. The migration to new materials and process technology will enable volume production capability for high-performance applications to 200 GHz and beyond.


ieee gallium arsenide integrated circuit symposium | 1999

Tunable linearity characteristics of a DC-3 GHz InP HBT active feedback amplifier

K.W. Kobayashi; A. Gutierrez-Aitken; P.C. Grossman; L.W. Yang; E. Kaneshiro; T. Block; A.K. Oki; D.C. Streit

This paper reports on the linearity characteristics of a DC-3 GHz InP HBT amplifier with tunable active feedback. By electronically tuning the active feedback of the amplifier, a 3.5 dB improvement in IP3 over a broadband is obtained compared to a purely resistive feedback design with the same do power. At an optimal tuning bias, the amplifier achieves a DC-3 GHz bandwidth, 9.5 dB gain, a P/sub 1dB/ of 13.3 dBm, and an IP3 of 31 dBm at 1 GHz while consuming a modest 35 mA through a 5 V supply. An lP3/P/sub DC/ ratio of 6.6:1 is achieved which is more than double that obtained from an equivalent conventional resistive feedback design. The improved linearity is obtained with no substantial impact on the MMIC size or DC power consumption. Under large signal operation the amplifier was also found to obtain 14-15 dB improvement in C/IM3 ratio. This simple MMIC technique is a cost effective means for improving the performance of standard linear MMIC products.


Archive | 2000

Heterojunction bipolar transistor with reduced thermal resistance

A. Gutierrez-Aitken; A.K. Oki; P. Chin; D.C. Streit


Archive | 1999

High power waveguide photodiode with an absorption layer with reduced absorption coefficient

A. Gutierrez-Aitken


Archive | 1999

Integrated circuit structure having a charge injection barrier

A. Gutierrez-Aitken; A.K. Oki; Michael Wojtowicz; D.C. Streit; Thomas R. Block; F.M. Yamada

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E. Kaneshiro

Air Force Research Laboratory

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P.C. Grossman

National Taiwan University

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