A.J. Scholten

PSP: An Advanced Surface-Potential-Based MOSFET Model for Circuit Simulation

This paper describes the latest and most advanced surface-potential-based model jointly developed by The Pennsylvania State University and Philips. Specific topics include model structure, mobility and velocity saturation description, further development and verification of symmetric linearization method, recent advances in the computational techniques for the surface potential, modeling of gate tunneling current, inclusion of the retrograde impurity profile, and noise sources. The emphasis of this paper is on incorporating the recent advances in MOS device physics and modeling within the compact modeling context

RF-CMOS performance trends

The impact of scaling on the analog performance of MOS devices at RF frequencies was studied. Trends in the RF performance of nominal gate length NMOS devices from 350-nm to 50-nm CMOS technologies are presented. Both experimental data and circuit simulations with an advanced validated compact model (MOS Model 11) have been used to evaluate the RF performance. RF performance metrics such as the cutoff frequency, maximum oscillation frequency, power gain, noise figure, linearity, and 1/f noise were included in the analysis. The focus of the study was on gate and drain bias conditions relevant for RF circuit design. A scaling methodology for RF-CMOS based on limited linearity degradation is proposed.

Gate current: Modeling, /spl Delta/L extraction and impact on RF performance

In this paper a new physical gate leakage model is introduced, which is both accurate and simple. It only uses 5 parameters, making parameter extraction straightforward. As a result the model can be used to extract effective length for modern CMOS technologies. The influence of gate current on the RF performance is studied.

Benchmark Tests for MOSFET Compact Models With Application to the PSP Model

This paper presents the results of several qualitative ldquobenchmarkrdquo tests that were used to verify the physical behavior of the PSP model and its usefulness for future generations of CMOS IC design. These include newly developed tests and new experimental data stemming from low-power, RF, mixed-signal, and analog applications of MOSFETs.

A Unified Nonquasi-Static MOSFET Model for Large-Signal and Small-Signal Simulations

The spline collocation-based nonquasi-static (NQS) model is further developed to include all regions of operation and small-geometry effects. The new formulation provides a unified (hence consistent) approach to both large-signal and small-signal NQS modeling and is sufficiently flexible to work with any surface-potential-based MOSFET model. The model is verified through comparison with the channel segmentation method, two-dimensional numerical simulations, and experimental results and demonstrates a controlled tradeoff between model accuracy and efficiency. The new NQS model has been implemented into PSP model. Circuit simulations are given to demonstrate the accuracy and applicability of the new model

Low-power voltage-controlled oscillators in 90-nm CMOS using high-quality thin-film postprocessed inductors

Wafer-level packaging (WLP) technology offers novel opportunities for the realization of high-quality on-chip passives needed in RF front-ends. This paper demonstrates a thin-film WLP technology on top of a 90-nm RF CMOS process with one 15-GHz and two low-power 5-GHz voltage-controlled oscillators (VCOs) using a high-quality WLP or above-IC inductor. The 5-GHz VCOs have a power consumption of 0.33 mW and a phase noise of -115 dBc/Hz and -111 dBc/Hz at 1-MHz offset, respectively, and the 15-GHz VCO has a phase noise of -105 dBc/Hz at 1-MHz offset with a power consumption of 2.76 mW.

The New CMC Standard Compact MOS Model PSP: Advantages for RF Applications

The surface-potential-based compact MOS model PSP is reviewed with special emphasis to features of interest to analog and RF designers. Various aspects of the model are discussed, such as Gummel symmetry, capacitance reciprocity at V DS = 0 V, parasitic resistances, junction modeling, distortion modeling, and noise modeling. Examples from circuit design are used to illustrate the benefits of the PSP model.

Unified non-quasi-static MOSFET model for large-signal and small-signal simulations

The spline-collocation-based non-quasi-static model is extended to include small-geometry effects and to enable both small-signal and large-signal simulations. The new NQS model has been implemented into circuit simulators using both SP and PSP models and verified using RF test data. Additional verification is provided by comparison with the results of numerical simulations and with the MM11 channel segmentation method. The large-signal and small-signal simulation results are compatible and consistent with the quasi-static formulation at low frequencies

Benchmarking the PSP Compact Model for MOS Transistors

Recently, the PSP model was selected as the first surface-potential-based industry standard compact MOSFET model. This work presents the results of several qualitative benchmark tests that over the last two years were used to verify the physical behavior of the new model and its usefulness for future generations of CMOS IC design. These include newly developed tests and previously unavailable experimental data stemming from low-power, RF, mixed-signal, and analog applications of MOSFETs.

A Compact Model for Valence-Band Electron Tunneling Current in Partially Depleted SOI MOSFETs

The valence-band electron (EVB) tunneling current in partially depleted silicon-on-insulator (SOI) MOSFETs increases as the gate oxide gets thinner and affects the dynamic behavior of devices and circuits. We present an engineering model of EVB tunneling current based on the surface-potential formulation. The new model is implemented in a SOI MOSFET compact model and is used to study the impact of EVB tunneling on circuit performance. Simulations of stacked logic gates show that the EVB tunneling current not only boosts circuit switching speed but also mitigates the history dependence of propagation delays