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Dive into the research topics where Abbes Amira is active.

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Featured researches published by Abbes Amira.


field-programmable technology | 2003

Improved SVD systolic array and implementation on FPGA

Aziz Ahmedsaid; Abbes Amira; Ahmed Bouridane

This paper presents an efficient systolic array for the computation of the Singular Value Decomposition (SVD). The proposed architecture is three times more efficient and faster than the Brent, Luk, Van Loan (BLV) SVD systolic array. The architecture has been implemented efficiently on FPGA using a high level language for hardware design Handel-C.


field programmable logic and applications | 2001

Accelerating Matrix Product on Reconfigurable Hardware for Signal Processing

Abbes Amira; Ahmed Bouridane; Peter Milligan

This paper investigates how some of the new features of the Xilinx Virtex FPGA may be used to support efficient and optimised implementation of matrix product based on Multiply and Accumulate (MAC) such operations are frequently used in signal applications. The principle new features that have been investigated are the Block RAM and the fully digital Delay-Locked Loop (DLL). The approach used for the matrix multiplication algorithm employs the idea used in the modified Booth encoder multiplication using Wallace Trees addition. Preliminary performance results and comparisons with similar algorithms implemented on multi-FPGA platforms have shown better performance for the proposed architecture.


international conference on image processing | 2004

Accelerating the computation of GLCM and Haralick texture features on reconfigurable hardware

Muhammad Atif Tahir; Ahmed Bouridane; Fatih Kurugollu; Abbes Amira

Grey level co-occurrence matrix (GLCM), one of the best known tool for texture analysis, estimates image properties related to second-order statistics. These image properties commonly known as Haralick texture features can be used for image classification, image segmentation, and remote sensing applications. However, their computations are highly intensive especially for very large images such as medical ones. Therefore, methods to accelerate their computations are highly desired. This paper proposes the use of reconfigurable hardware to accelerate the calculation of GLCM and Haralick texture features. The performances of the proposed co-processor are then assessed and compared against a microprocessor based solution.


information sciences, signal processing and their applications | 2003

A quadratic classifier based on multispectral texture features for prostate cancer diagnosis

Mohammed Ali Roula; Ahmed Bouridane; Fatih Kurugollu; Abbes Amira

This paper is concerned with the development of an automatic classification system for use in prostate cancer diagnosis. The system aims to detect and classify nuclei textures captured from microscopic samples taken from needle biopsies. The main contribution here is that the analysis is carried out over thirty-three spectral bands instead of using the conventional grey scale or RGB colour spaces. A set of texture and morphological features has been computed for all these spectral bands for use in the discrimination phase. The large vector size has then been reduced to a manageable size by using a principal component analysis. Classification tests have been carried out using quadratic discriminant analysis and have shown that multispectral analysis significantly improves the overall classification performances when compared with the case where multispectral features are not considered.


Image and Vision Computing | 2005

Accelerating colour space conversion on reconfigurable hardware

Faycal Bensaali; Abbes Amira

Colour space conversion is very important in many types of image processing applications including video compression. This operation consumes up to 40% of the entire processing power of a highly optimised decoder. Therefore, techniques which efficiently implement this conversion are desired. This paper presents two novel architectures for efficient implementation of a Colour Space Converter (CSC) suitable for Field Programmable Gate Array (FPGAs) and VLSI. The proposed architectures are based on Distributed Arithmetic (DA) ROM accumulator principles. The architectures have been implemented and verified using the Celoxica RC1000 FPGA development board. In addition, they are platform independent and have a low latency (eight cycles). The first architecture has a throughput of height, while the second one is fully pipelined and has a throughput of one and capable of sustained data rate of over 234 mega-conversions/s.


EURASIP Journal on Advances in Signal Processing | 2005

A novel prostate cancer classification technique using intermediate memory tabu search

Muhammad Atif Tahir; Ahmed Bouridane; Fatih Kurugollu; Abbes Amira

The introduction of multispectral imaging in pathology problems such as the identification of prostatic cancer is recent. Unlike conventional RGB color space, it allows the acquisition of a large number of spectral bands within the visible spectrum. This results in a feature vector of size greater than 100. For such a high dimensionality, pattern recognition techniques suffer from the well-known curse of dimensionality problem. The two well-known techniques to solve this problem are feature extraction and feature selection. In this paper, a novel feature selection technique using tabu search with an intermediate-term memory is proposed. The cost of a feature subset is measured by leave-one-out correct-classification rate of a nearest-neighbor (1-NN) classifier. The experiments have been carried out on the prostate cancer textured multispectral images and the results have been compared with a reported classical feature extraction technique. The results have indicated a significant boost in the performance both in terms of minimizing features and maximizing classification accuracy.


signal processing systems | 2002

An FPGA based parameterizable system for matrix product implementation

Abbes Amira; F. Bensaali

This paper presents novel architectures for efficient implementations of matrix product using an FPGA based parameterizable system. These operations are important in many signal and image processing applications including image and speech compression, filtering, coding and beamforming. Two novel architectures for matrix multiplication using both systolic architecture and distributed arithmetic design methodologies are presented. The first approach uses the Baugh-Wooley algorithm for a systolic architecture implementation. The second approach Is based on both distributed arithmetic ROM and accumulator structure. Implementations of the algorithms on a Xilinx FPGA board are described. Distributed arithmetic approach exhibits better performances when compared with the systolic architecture approach.


international symposium on circuits and systems | 2005

An automatic face recognition system based on wavelet transforms

Abbes Amira; Peter Farrell

Face recognition is emerging as an active research area spanning several disciplines, such as image processing, pattern recognition, computer vision and neural networks. Face recognition technology has numerous commercial and law enforcement applications. The paper presents an automatic system based on wavelet transforms for face recognition. A range of wavelet decompositions, together with different threshold types and segmentation algorithms, has been implemented in order to investigate the best performances. Haar, Gabor and 9/7 wavelet filters have been implemented as part of the proposed algorithms due to their simplicity, suitability and regularity for face recognition using multiresolution approaches.


signal processing systems | 2000

A high throughput FPGA implementation of a bit-level matrix product

Abbes Amira; Ahmed Bouridane; Peter Milligan; Paul Sage

This paper presents a novel architecture for a matrix product algorithm. The paper describes the mathematical model for the algorithm (based on the Baugh-Wooley algorithm), the associated design and implementation of the algorithm on a Xilinx FPGA board, and discusses the efficiency of the implementation. The architecture developed requires O(N/sup 2/) and O(2nN) and O(N) and O(2nN) as area and time complexities respectively for the matrix-matrix product and matrix-vector product, respectively (where N is the matrix size and n is the word length).


international conference on pattern recognition | 2004

Feature selection using tabu search for improving the classification rate prostate needle biopsies

Muhammad Atif Tahir; Ahmed Bouridane; Fatih Kurugollu; Abbes Amira

The introduction of multispectral imaging in pathology problems such as the identification of prostatic cancer is recent. Unlike conventional RGB color space, it allows the acquisition of large number of spectral bands within the visible spectrum. This results in a feature vector of size greater than 100. For such high dimensionality problems, pattern recognition techniques suffer from the well-known curse-of-dimensionality problem. The two well known techniques to solve this problem are feature extraction and feature selection. A feature selection technique using tabu search with an intermediate-term memory is proposed. The cost of a feature subset is measured by leave-one-out correct-classification rate of a nearest-neighbor (1-NN) classifier. Experiments have been carried out on textured multispectral images taken at 16 spectral channels and the results have been compared with a reported classical feature extraction technique.

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Faycal Bensaali

Queen's University Belfast

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Peter Milligan

Queen's University Belfast

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Isa Servan Uzun

Queen's University Belfast

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Fatih Kurugollu

Queen's University Belfast

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Aziz Ahmedsaid

Queen's University Belfast

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