Abderrazak Jemai

Two stage particle swarm optimization to solve the flexible job shop predictive scheduling problem considering possible machine breakdowns

The flexible job shop scheduling problem under machine breakdowns is considered.A two stages particle swarm optimization is proposed to solve the problem.The proposed algorithm optimizes makespan, robustness and stability of the solution.A predictive schedule witch is more robust and stable is obtained. In real-world industrial environments, unplanned events and unforeseen incidents can happen at any time. Scheduling under uncertainty allows these unexpected disruptions to be taken into account. This work presents the study of the flexible job shop scheduling problems (FJSP) under machine breakdowns. The objective is to solve the problem such that the lowest makespan is obtained and also robust and stable schedules are guaranteed. A two-stage particle swarm optimization (2S-PSO) is proposed to solve the problem assuming that there is only one breakdown. Various benchmark data taken from the literature, varying from Partial FJSP to Total FJSP, are tested. Computational results prove that the developed algorithm is effective and efficient enough compared to literature approaches providing better robustness and stability. Statistical analyses are given to confirm this performance.

Modeling SW to HW task migration for MPSOC performance analysis

Codesign choices of a system differ in terms of different hardware/software partitions, different types of architectural components, different communication architectures, etc. This paper presents an analytic method to estimate the gain on a system throughput when a software task is selected to be moved to hardware during the codesign process. The method is based on formal transformations of a Synchronous Data Flow Graph that models the application as well as its mapping to architecture. The proposed method is applied to the MJPEG decoder using the predictable MPSOC design tool SDF3 [2].

A New Rescheduling Heuristic for Flexible Job Shop Problem with Machine Disruption

In real-world manufacturing systems, schedules are often confronted with uncertainty factors such as random machine breakdown, random process time, random job arrivals or job cancellations. A large number of impromptu disruptions frequently affect the scheduled operations and invalidate the original schedule. There is still the need for rescheduling methods that can work effectively in disruption management. In this work, an algorithm for rescheduling the affected operations in a flexible job shop is presented and its performance, with respect to measures of efficiency and stability, is compared with the Right Shift Rescheduling technique. The proposed method is tested on different benchmark scheduling problems with various disruption scenarios. Experimental results show that the proposed rescheduling method improves the efficiency and stability when compared to Right Shift Rescheduling method.

A New profiling and pipelining approach for HEVC Decoder on ZedBoard Platform

Corresponding Author: Habib Smei, Université de Tunis El Manar, Faculté des Sciences de Tunis, Laboratoire LIP2, 2092, Tunis, Tunisie Email: habibsmei@gmail.com Advances in Science, Technology and Engineering Systems Journal Vol. 2, No. 6, 40-48 (2017)

Fault-Tolerant in Embedded Systems (MPSoC): Performance Estimation and Dynamic Migration Task

A R T I C L E I N F O A B S T R A C T Article history: Received: 09 April, 2017 Accepted: 24 June, 2017 Online: 20 July, 2017 Multiprocessor Systems-on-Chip (MPSoC) allow the implementation of heterogeneous architectures with a high integration capacity. In recent years, computational requirements MPSoC are increasing exponentially. This complexity, coupled with constantly evolving specifications, has forced designers to consider intrinsically flexible implementations. Deploying applications typical of multimedia domains is difficult, not only due to the heterogeneous parallelism in the platforms, but also due to the performance constraints that typify these systems. An application can be modeled as a set of cooperative tasks. A task can be implemented in software or in hardware depending on its complexity and the involved cost. Our proposal is a fault tolerance approach which combines the results of a performance model and a technical’s fault tolerance. We interest of the dynamic migration task to resolve the Fault-Tolerant for Multiprocessors Embedded System. We exploited an example of multimedia application (MJPEG decoder) to find optimal Fault tolerance systems. Our aim in this paper is to exploit the classic technique of fault tolerance. The solution chosen is the transformation of software processing into hardware processing. And also, exploitation of hybrid models (simulation/analytics). The goal is to have a Fault Tolerant Embedded System.

Using IoT in breakdown tolerance: PSO solving FJSP

Solving Flexible Job Scheduling Problem (FJSP) under disruptions and unplanned events has achieved more attention in many researches. Today, the internet of things (IoT) is being implemented everywhere which is of human concern like smart city, smart environment, security, smart business process, smart agriculture, home automation and healthcare. Our objective in this work is to investigate the impact of emerging Internet of Things (IoT) on smart modern manufacturing to specially face Breakdown. An improved multi agent particle swarm optimization is presented and implemented on physically distributed system composed of embedded systems to solve the FJSP under machine breakdowns. We address also IoT challenges related to minimizing communication overheads.

Automatic generation of software-hardware migration in MPSoC systems

we are going to focus on the study and the design of MPSOC systems, more precisely as part of improving the performances of the applications implanted on MPSOC architecture. The objective of this research is to study the problems of the passage from a purely software realization to a realization admitting one or several hardware components and to elaborate a methodology of automatic generation of the migration of a software task into a hardware component in MPSOC systems. The fact of transforming a software task into a hardware task leads to many changes, so much of the hardware side (connection, requirement of an interruption controller, …), of the software side (a task at least, Inputs/Outputs(I/O), synchronization, …) and from an architectural point of view, notable aspects of memorization of data. Experimentation is made on the MJPEG decoder to illustrate the effectiveness of our tool of automatic generation of migration.

Performance modeling and estimation along an MPSoC flow

We present in this paper, a new approach of heterogeneous multiprocessors systems-on-chip architecture (MPSoC) co-design based on performance control. This approach is centered on the structuring of the models and the levels of abstraction. Four models are proposed permuting to establish the refinement and the control at the time of the passage by six levels of abstraction. An extension of Khanpsilas model, based on the addition of the relative annotations to the times of execution of the parallel threads and to the size of the data exchanged by these threads, is used. Experimentation is achieved, in this context, on the MJPEG decoder and the Virtex II Pro platform of Xilinx.