Abel G. Silva-Filho

Heuristic for two-level cache hierarchy exploration considering energy consumption and performance

In this work is presented an automated method for adjusting two-level cache memory hierarchy in order to reduce energy consumption in embedded applications. The proposed heuristic, TECH-CYCLES (Two-level Cache Exploration Heuristicconsidering CYCLES), consists of making a small search in the space of configurations of the two-level cache hierarchy, analyzing the impact of each parameter in terms of energy and number of cycles spent for a given application. Experiments show an average reduction of about 41% in the energy consumption by using our heuristic when compared with the existing heuristic (TCaT), also for two-level caches. Besides the energy improvement, this method also reduces the number of cycles needed to execute a given application by about 25%. In order to validate the proposed heuristic, twelve benchmarks from the MiBench suite have been used.

Detection and classification of masses in mammographic images in a multi-kernel approach

BACKGROUND AND OBJECTIVE According to the World Health Organization, breast cancer is the main cause of cancer death among adult women in the world. Although breast cancer occurs indiscriminately in countries with several degrees of social and economic development, among developing and underdevelopment countries mortality rates are still high due to low availability of early detection technologies. From the clinical point of view, mammography is still the most effective diagnostic technology, given the wide diffusion of the use and interpretation of these images. METHODS Herein this work we propose a method to detect and classify mammographic lesions using the regions of interest of images. Our proposal consists in decomposing each image using multi-resolution wavelets. Zernike moments are extracted from each wavelet component. Using this approach, we can combine both texture and shape features, which can be applied both to the detection and classification of mammary lesions. We used 355 images of fatty breast tissue of IRMA database, with 233 normal instances (no lesion), 72 benign, and 83 malignant cases. RESULTS Classification was performed by using SVM and ELM networks with modified kernels in order to optimize accuracy rates, reaching 94.11%. Considering both accuracy rates and training times, we defined the ration between average percentage accuracy and average training time in a reverse order. Our proposal was 50 times higher than the ratio obtained using state-of-the-art approaches. CONCLUSIONS As our proposed model can combine high accuracy rate with low learning time, whenever a new data is received, our work will be able to save a lot of time, hours, in learning process in relation to the best method of the state-of-the-art.We propose a method to detect and classify mammographic lesions using the regions of interest of images.We use multi-resolution wavelets and Zernike moments as extract feature extractor image stage.We can combine both texture and shape features, which can be applied both to the detection and classification of mammary lesions.Considering the ratio between accuracy and training time, our proposal proved to be 50 times superior to state-of-the-art approaches.As our proposed model can combine high accuracy rate with low learning time, whenever a new data is received, our work will be able to save a lot of time, hours, in learning process in relation to the best method of the state-of-the-art approaches. Background and ObjectiveAccording to the World Health Organization, breast cancer is the main cause of cancer death among adult women in the world. Although breast cancer occurs indiscriminately in countries with several degrees of social and economic development, among developing and underdevelopment countries mortality rates are still high due to low availability of early detection technologies. From the clinical point of view, mammography is still the most effective diagnostic technology, given the wide diffusion of the use and interpretation of these images. MethodsHerein this work we propose a method to detect and classify mammographic lesions using the regions of interest of images. Our proposal consists in decomposing each image using multi-resolution wavelets. Zernike moments are extracted from each wavelet component. Using this approach, we can combine both texture and shape features, which can be applied both to the detection and classification of mammary lesions. We used 355 images of fatty breast tissue of IRMA database, with 233 normal instances (no lesion), 72 benign, and 83 malignant cases. ResultsClassification was performed by using SVM and ELM networks with modified kernels in order to optimize accuracy rates, reaching 94.11%. Considering both accuracy rates and training times, we defined the ration between average percentage accuracy and average training time in a reverse order. Our proposal was 50 times higher than the ratio obtained using state-of-the-art approaches. ConclusionsAs our proposed model can combine high accuracy rate with low learning time, whenever a new data is received, our work will be able to save a lot of time, hours, in learning process in relation to the best method of the state-of-the-art.

An Intelligent Mechanism to Explore a Two-Level Cache Hierarchy Considering Energy Consumption and Time Performance

Cache memory hierarchy contributes positively to system performance. Moreover, tuning cache architectures in platforms for embedded applications can dramatically reduce energy consumption. This paper presents an automated method for adjusting two-level cache memory hierarchy intended for data caches in order to reduce energy consumption and improve the performance of embedded applications. We propose an automated mechanism called TEMGA (Two-level cache Exploration Mechanism based on Genetic Algorithm), to determine the suitable cache hierarchy configuration by exploring a small part of search space. In our experiments, we applied the proposed mechanism to 12 different benchmarks from the MiBench suite. The results show an average reduction of about 15% in the energy consumption for data caches when compared to existing heuristics and a reduction of 5 times in the number of cycles needed to execute applications from Mibench Benchmark suite.Speedup in distributed executions of constraint logic programming (CLP) applications are directed related to a good constraint partitioning algorithm. In this work we study different mechanisms to distribute constraints to processors based on straightforward mechanisms such as round-robin and block distribution, and on a more sophisticated automatic distribution method, grouping-sink, that takes into account the connectivity of the constraint network graph. This aims at reducing the communication overhead in distributed environments. Our results show that grouping-sink is, in general, the best alternative for partitioning constraints as it produces results as good or better than round-robin or blocks with low communication rate.

An ESL approach for energy consumption analysis of cache memories in SoC platforms

The design of complex circuits as SoCs presents two great challenges to designers. One is the speeding up of system functionality modeling and the second is the implementation of the system in an architecture that meets performance and power consumption requirements. Thus, developing new high-level specification mechanisms for the reduction of the design effort with automatic architecture exploration is a necessity. This paper proposes an Electronic-System-Level (ESL) approach for system modeling and cache energy consumption analysis of SoCs called PCacheEnergy Analyzer. It uses as entry a high-level UML-2.0 profile model of the system and it generates a simulation model of a multicore platform that can be analyzed for cache tuning. PCacheEnergyAnalyzer performs static/dynamic energy consumption analysis of caches on platforms that may have different processors. Architecture exploration is achieved by letting designers choose different processors for platform generation and different mechanisms for cache optimization. PCacheEnergy Analyzer has been validated with several applications of Mibench, Mediabench, and PowerStone benchmarks, and results show that it provides analysis with reduced simulation effort

An Optimization Mechanism Intended for Two-Level Cache Hierarchy to Improve Energy and Performance Using the NSGAII Algorithm

Tuning cache architectures in MPSoC platforms for embedded applications can dramatically reduce energy consumption. This paper presents a design tool for adjusting a two-level cache memory hierarchy that uses a fast non-dominated sorting algorithm (NSGAII) in order to provide decision support capabilities. It aims to reduce energy consumption and improve the performance of embedded applications. This optimization mechanism finds the best set of cache configurations (Pareto-Front) and offers support to the architecture designer in order to provide a set of non-dominated solutions for a decision maker. In our experiments, we applied the proposed mechanism to 12 different applications from the MiBench benchmark suite. Furthermore, the simulation results showed that the solutions found by our proposal are comparable to the results of other techniques and, for 67% of the analyzed cases, the efficiency of the mechanism was achieved.

An FPGA-Based Accelerator to Speed-Up Matrix Multiplication of Floating Point Operations

Field Programmable Gate Arrays (FPGAs) are able to provide a high computational parallelism that can be exploited to achieve high performance improvements in intensive data processing problems. In this paper our efforts were directed towards developing a PC cluster based on nodes that use FPGAs as co-processors. The target application is a floating-point large dense matrix multiplication. Experimental results for just one node of the cluster, consisting of a Xilinx Virtex 5 VLX50T with a PCI interface, showed performance improvements compared with the Intel Core2 Quad at 2.66 GHz, achieving a speed-up of 1.19 times. Other analyses in terms of frequency variation and power dissipation have been made by considering different matrix sizes running in one node of the cluster. Recently, the platform has been updated for a powerful Gidel plaftorm, the PROCe III 260E. This new platform consists of 1 FPGA Stratix III per board. In this board, it is possible to allocate up to 40 MACs per FPGA, reaching an overall speed-up of approximately 11.2 per node of the cluster when compared with the same general-purpose processor. A full example is presented in this paper.

Dynamic frequency scaling on android platforms for energy consumption reduction

Dynamic Voltage and Frequency Scaling (DVFS) is an efficient energy saving technique for processing units. This paper evaluates the impact of the DVFS on the energy consumption, when it is applied to adjust the operational frequency of an Android based smartphone during common mobile activities, such as 3G and Wi-Fi communications. An experimental infrastructure was defined to carry out energy measurements, using a simulated environment and a Samsung Galaxy SII smartphone. After defining the best operational frequency for each activity, we identified the amount of energy that could be saved if the smartphone was using an optimized strategy to adjust the frequency. Results of the proposed approach were compared to the performance mode of this smartphone and an average energy reduction of about 23.4% was obtained.

An adaptive semi-supervised Fuzzy GrowCut algorithm to segment masses of regions of interest of mammographic images

Graphical abstractDisplay Omitted According to the World Health Organization, breast cancer is the most common cancer in women worldwide, becoming one of the most fatal types of cancer. Mammography image analysis is still the most effective imaging technology for breast cancer diagnosis, which is based on texture and shape analysis of mammary lesions. The GrowCut algorithm is a general-purpose segmentation method based on cellular automata, able to perform relatively accurate segmentation through the adequate selection of internal and external seed points. In this work we propose an adaptive semi-supervised version of the GrowCut algorithm, based on the modification of the automaton evolution rule by adding a Gaussian fuzzy membership function in order to model non-defined borders. In our proposal, manual selection of seed points of the suspicious lesion is changed by a semiautomatic stage, where just the internal points are selected by using a differential evolution algorithm. We evaluated our proposal using 57 lesion images obtained from MiniMIAS database. Results were compared with the semi-supervised state-of-the-art approaches BEMD, BMCS, Wavelet Analysis, LBI, Topographic Approach and MCW. Results show that our method achieves better results for circumscribed, spiculated lesions and ill-defined lesions, considering the similarity between segmentation results and ground-truth images.

Energy-Aware Technology-Based DVFS Mechanism for the Android Operating System

DVFS is an efficient energy saving technique for processors during program execution time. In this paper, we will focus efforts on 3G and Wi-Fi technologies to evaluate the impact of energy consumption when combined with DVFS mechanism based on the Android operating system. An experimental infrastructure with basis on Samsungs Smartphone was used to evaluate the proposed strategy to reduce energy consumption. Results of the proposed approach was compared with nonoptimized approach and an average reduction about 30% in terms of energy consumption was obtained when compared with performance mode.

Energy consumption reduction mechanism by tuning cache configuration usign NIOS II processor

The memory hierarchy of an embedded system can consume up to 50% of microprocessor system power (Segars, S.,2001). This paper proposes: (i) a design flow to estimate energy consumption and performance using an SoC system based on FPGA, and (ii) an automated architecture exploration mechanism based on parameter variation of a memory hierarchy and NIOS II processor. Results based on Mibench and XiRisc suite have demonstrated that, on average, with 9% of the design space, an energy consumption reduction of about 27% has been achieved, as well as an increase of 10% in the performance of the application.