Adam M. Jones

Ultra-low crosstalk, CMOS compatible waveguide crossings for densely integrated photonic interconnection networks.

We explore the design space for optimizing CMOS compatible waveguide crossings on a silicon photonics platform. This paper presents simulated and experimental excess loss and crosstalk suppression data for vertically integrated silicon nitride over silicon-on-insulator waveguide crossings. Experimental results show crosstalk suppression exceeding -49/-44 dB with simulation results as low as -65/-60 dB for the TE/TM mode in a waveguide crossing with a 410 nm vertical gap.

A Silicon-Polymer Hybrid Modulator—Design, Simulation and Proof of Principle

Optimal dimensions are found for the silicon waveguide in an electro-optic (EO) polymer cladding-based silicon waveguide modulator. The confinement factor as well as the effective index of the mode are taken into account. The influence of the coplanar electrode spacing and electrode height on performance are examined and a figure of merit formula for choosing the optimal device geometry is shown. The design space for both 1550 nm and 1310 nm wavelengths is explored. With the optimal 275 nm waveguide width and 4 μm electrode spacing, a Vπ of a few volts can be achieved even with moderate r33 EO polymers. Experimental results on a fabricated modulator are shown and compared with the predicted performance.

Silicon photonics platform for national security applications

We review Sandias silicon photonics platform for national security applications. Silicon photonics offers the potential for extensive size, weight, power, and cost (SWaP-c) reductions compared to existing III-V or purely electronics circuits. Unlike most silicon photonics foundries in the US and internationally, our silicon photonics is manufactured in a trusted environment at our Microsystems and Engineering Sciences Application (MESA) facility. The Sandia fabrication facility is certified as a trusted foundry and can therefore produce devices and circuits intended for military applications. We will describe a variety of silicon photonics devices and subsystems, including both monolithic and heterogeneous integration of silicon photonics with electronics, that can enable future complex functionality in aerospace systems, principally focusing on communications technology in optical interconnects and optical networking.

Athermal silicon optical add-drop multiplexers based on thermo-optic coefficient tuning of sol-gel material

Silicon photonics has gained interest for its potential to provide higher efficiency, bandwidth and reduced power consumption compared to electrical interconnects in datacenters and high performance computing environments. However, it is well known that silicon photonic devices suffer from temperature fluctuations due to silicons high thermo-optic coefficient and therefore, temperature control in many applications is required. Here we present an athermal optical add-drop multiplexer fabricated from ring resonators. We used a sol-gel inorganic-organic hybrid material as an alternative to previously used materials such as polymers and titanium dioxide. In this work we studied the thermal curing parameters of the sol-gel and their effect on thermal wavelength shift of the rings. With this method, we were able to demonstrate a thermal shift down to -6.8 pm/°C for transverse electric (TE) polarization in ring resonators with waveguide widths of 325 nm when the sol-gel was cured at 130°C for 10.5 hours. We also achieved thermal shifts below 1 pm/°C for transverse magnetic (TM) polarization in the C band under different curing conditions. Curing time compared to curing temperature shows to be the most important factor to control sol-gels thermo-optic value in order to obtain an athermal device in a wide temperature range.

Layer separation optimization in CMOS compatible multilayer optical networks

We explore the design space surrounding a CMOS compatible silicon nitride over silicon-on-insulator 3D optical layer for photonic interconnection networks and compare the results with single layer approaches.

A silicon-polymer hybrid modulator — Simulation and proof of principle

Optimal dimensions are found for the silicon waveguide in an electro-optic (EO) polymer cladding-based silicon waveguide modulator. The confinement factor as well as the effective index of the mode are taken into account. With the optimal 275 nm waveguide width and 4 μm electrode spacing, Vπ of a few volts can be achieved even with low r33 EO polymers.

Subpicometer thermal shifts in silicon photonic micro-ring resonators with sol-gel claddings (Conference Presentation)

Electronic interconnects are reaching their limit in terms of speed, dimensions and permissible power consumption. This has been a major concern in data centers and large scale computing platforms, creating limits to their scalability especially with respect to power consumption. Silicon photonic-electronic integration is viewed as a viable alternative that enables reliability, high efficiency, low cost and small footprint. In particular, silicon with its high refractive index, has enabled the integration a many individual optical elements (ring resonators) in small areas. Though silicon has a high thermo-optic coefficient (1.8×10^-4/°C) compared to silica, small thermal fluctuations can affect the optical performance especially for WDM applications. Therefore, a passive athermal solution for silicon photonic devices is required in order to reduce thermal sensitivity and power consumption. We have achieved this goal by replacing the silica top cladding with negative thermo-optic coefficient (TOC) materials. While polymers and titanium dioxide(titania) have a negative TOC, polymers can’t handle high temperature processing and titania needs very tight thickness control and expensive deposition under vacuum. In this work we propose to use a sol-gel inorganic-organic hybrid material that has the benefits of both worlds. We were able to find optimum curing conditions to athermalize ring resonators by studying various sol-gel curing times and curing temperatures. Our athermal rings operate in a wide temperature range from 5C – 100C with thermal shifts below 1pm/C and low loss. Furthermore, we demonstrate that our athermal approach does not deleteriously effect critical device parameters, such as insertion loss and resonator Q factors.

Front-side mid-level Tungsten TSV integration for high-density 3D applications

We demonstrate a front-side process integration method to insert high-density 1.2um diameter Tungsten (W) Through Silicon Vias (TSVs) into advanced-node logic wafers after metal-4. This late-TSV-middle approach offers the ability to build 3D technology into commercially available 90nm-node CMOS, while avoiding many of the challenges associated with TSV-last integrations. We also demonstrate a TSV-reveal process compatible with small-diameter W TSVs.

Efficient coefficient extraction from doublet resonances in microphotonic resonator transmission functions

We develop a computationally efficient and robust algorithm to automatically extract the coefficients of doublet resonances and apply this technique to 418 resonances in ring resonator transmission data with a mean RMS deviation of 7.28 × 10-4.

Racetrack resonator as a loss measurement platform for photonic components

This work represents the first complete analysis of the use of a racetrack resonator to measure the insertion loss of efficient, compact photonic components. Beginning with an in-depth analysis of potential error sources and a discussion of the calibration procedure, the technique is used to estimate the insertion loss of waveguide width tapers of varying geometry with a resulting 95% confidence interval of 0.007 dB. The work concludes with a performance comparison of the analyzed tapers with results presented for four taper profiles and three taper lengths.