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Dive into the research topics where Ahmer Syed is active.

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Featured researches published by Ahmer Syed.


electronic components and technology conference | 2004

Accumulated creep strain and energy density based thermal fatigue life prediction models for SnAgCu solder joints

Ahmer Syed

Pb free solder is fast becoming a reality in electronic manufacturing due to marketing and legislative pressures. The industry has pretty much concluded that various versions of SnAgCu solder alloy offer the best alternative for eutectic Sn/Pb solder currently in use. With the current trend of cheaper, faster, and better electronic equipment, it has become increasingly important to evaluate the package and system performance very early in the design cycle using simulation tools. This requires life prediction models for new solder alloy systems so that the package-to-board interconnect reliability can be predicted for various environmental and field conditions. This paper describes in detail the life prediction models for SnAgCu solder joints. The models are based on published constitutive equations for this alloy and thermal cycle fatigue data on actual components. The approach uses advanced finite element modeling and analysis techniques and is based on mechanics of deformation. Both accumulated creep strain and creep strain energy density based models are developed. The model has been correlated with a number of data points and predicts life within 25% in most cases. The framework of modeling and prediction methodology described here is fully compatible with the framework used for SnPb solder previously.


electronic components and technology conference | 2001

Predicting solder joint reliability for thermal, power, and bend cycle within 25% accuracy

Ahmer Syed

Solder joint reliability has received a renewed interest since the inception of BGA and CSP type packages. While traditionally board level reliability during thermal and power cycling is considered important for most applications, solder joint failures due to board bending have also become a major reliability concern for portable applications. With the current trend of cheaper, faster, and better electronic equipment, it has become increasingly important to evaluate the package and system performance very early in the design cycle using simulation tools. Although a number of life prediction models for solder joint under thermal cycle conditions have been proposed in the literature, not enough work has been reported in extending these models to power and bend cycle simulations. The accuracy of life prediction tool has also become critically important, as the designs need to be evaluated and improved with high degree of confidence not through relative comparison but by providing absolute numbers. This paper describes in detail the life prediction model for solder joints for thermal cycle conditions and its extension to power and bend, cycle conditions. The approach uses advance finite element modeling and analysis techniques such as constraint equations and sub-structuring and is based on mechanics of deformation. The model has been correlated with more than 60 data points and predicts life within 25% in most cases. The framework of modeling and prediction methodology described here is fully applicable for developing life prediction models for Pb free solder also, once the deformation mechanisms are identified.


electronic components and technology conference | 2005

A methodology for drop performance prediction and application for design optimization of chip scale packages

Ahmer Syed; Seung Mo Kim; Wei Lin; Jin Young Khim; Eun Sook Song; Jae Hyeon Shin; Tony Panczak

As handheld electronic products are more prone to being dropped during useful life, package to board interconnect reliability has become a major concern for these products. This has prompted the industry to evaluate the drop performance of CSP packages while mounted on printed wiring boards using board level drop testing. Although a new board level test method has been standardized through JEDEC (JESD22-B 111), characterization tests take quite a long time to complete, extending the design cycle. This paper proposes a method to compare and evaluate the drop performance through simulations at the design stage. A global-local approach is used to first determine the dynamic response of the board during drop and then to translate it into stresses and strain energy density in solder joints and intermetallic layers. The dynamic response of the board is validated by using data from actual board level testing as per JEDEC standard. The solder joint and intermetallic stresses are then related to drop to failure test data to derive a prediction model. The method is then applied to quantify the effect of package design parameters on the drop performance. Factors considered include material set, thickness of various material layers, pad size, and ball size. The same factors were tested in board level drop to further validate the prediction model. Experiments were also conducted to quantify the effects of package ball pad finish on the drop performance through board level testing according to JESD22-B111. The results indicate that the drop performance can be increased by a factor of 4 or more by changing package design and material variables.


electronic components and technology conference | 1996

Thermal fatigue reliability enhancement of plastic ball grid array (PBGA) packages

Ahmer Syed

A combined design of experiment and numerical analysis approach is used to determine the effect of four design parameters on the thermal fatigue life of solder joints. The four parameters considered were: substrate thickness, array configuration, ball pitch, acid pad size. A full factorial experiment was designed which was conducted numerically. A validated life prediction model was then used to determine the fatigue lives for each combination. Up to a factor of five improvement in fatigue life is predicted when these parameters were changed from one level to another.


Microelectronics Reliability | 2000

Solder joint fatigue life of fine pitch BGAs – impact of design and material choices

Robert Darveaux; Jim Heckman; Ahmer Syed; Andrew Mawer

Abstract The impact of design and material choices on solder joint fatigue life for fine pitch BGA packages is characterized. Package variables included die size, package size, ball count, pitch, mold compound, and substrate material. Test board variables included thickness, pad configuration, and pad size. Three thermal cycle conditions were used. Fatigue life increased by up to 6× as die size was reduced. For a given die size, fatigue life was up to 2× longer for larger packages with more solder balls. Mold compounds with higher filler content reduced fatigue life by up to 2× due to a higher stiffness and lower thermal expansion coefficient. Upilex S tape with punched holes gave 1.15× life improvement over Kapton E tape with etched holes. Once optimized, tape-based packages have equal board level reliability to laminate-based packages. Solder joint fatigue life was 1.2× longer for 0.9 mm thick test boards compared to 1.6 mm thick boards due to a lower assembly stiffness. The optimum PCB pad design depends on failure location. For CSP applications, NSMD test board pads give up to 3.1× life improvement over SMD pads. For a completely fan-out design, there was a 1.6× acceleration factor between −40⇔125°C, 15 min ramps, 15 min dwells and 0⇔100°C, 10 min ramps, 5 min dwells.


EuroSime 2006 - 7th International Conference on Thermal, Mechanical and Multiphysics Simulation and Experiments in Micro-Electronics and Micro-Systems | 2006

Updated Life Prediction Models for Solder Joints with Removal of Modeling Assumptions and Effect of Constitutive Equations

Ahmer Syed

There are two sources of errors in any finite element based life prediction model: the finite element mesh and assumptions, and the material properties used -specifically the constitutive model used to describe the behavior of solder joints during temperature cycling. The use of these assumptions may prohibit the application of life prediction model to conditions beyond the ones used to develop the model. The author has previously proposed life prediction models for SnPb and SnAgCu solder joints using advanced finite element modeling techniques such as sub-structuring and multi-point constraints. The assumptions were necessary to increase the efficiency of solution with available computing power. With the advances in computing technology, these assumptions are no longer necessary, and more accurate life prediction can be achieved by eliminating most of the modeling assumptions. In this paper, the updated life prediction model parameters for SnAgCu solder joints are presented without the use of sub-structuring and multi-point constraints. All joints for a particular package-board interconnection are modeled as having non-linear properties. In addition, a detailed mesh refinement study is done to determine the minimum mesh density required to yield near mesh-independent results. In addition to modeling assumptions, the constitutive equation used for solder joints may also influence the life prediction model parameters. To investigate this further, the creep behavior of SnAgCu solder joints is represented by using published constitutive equations (double power law creep and hyperbolic sine equation). The results show a significant influence of constitutive equation on creep strain based life prediction model but minimum impact when energy density based approach is used


electronics packaging technology conference | 2006

Alloying effect of Ni, Co, and Sb in SAC solder for improved drop performance of chip scale packages with Cu OSP pad finish

Ahmer Syed; Tae Seong Kim; Young Min Cho; Chang Woo Kim; Min Yoo

While SAC305 and SAC405 have been shown to yield similar or better reliability than SnPb solder in temperature cycle test, it is becoming evident that the same Pb free solders perform poorly under drop/impact conditions. The primary reasons for this reduced performance are the lower ductility of solder and brittle IMC formation at CSP pad and solder interface. Although some improvements are possible by changing the pad finish from NiAu to Cu OSP, the performance is still not as good as NiAu-SnPb combination. In addition, Cu-Solder interface results in the formation of Cu3Sn intermetallic compound resulting in brittle interface as well as voiding within this IMC with aging. This study focuses on the alloying effect of Ni, Co, and Sb in SAC solder on the IMC formation and the drop performance of packages. The solder alloys considered had small % of either Ni, Co, or Sb added with varying basic composition of Sn, Ag, and Cu. A total of 6 alloys were evaluated against Sn3.0Ag0.5Cu solder alloy. The solder balls of each alloy were attached to packages with Cu OSP surface finish using standard package assembly process. The evaluation matrix included package and board level tests as well as interfacial IMC studies. The package level tests (ball shear, ball pull, and zone shear) and IMC studies were conducted on as-soldered and thermally aged samples. Board level drop tests were performed as per JESD22-B111 test method. The results show that changes in SnAgCu composition and the addition of some elements in SnAgCu based solder can significantly improve the drop performance, primarily because of differences in IMC formation and the strength of solder alloys. While lower Ag improves the ductility of solder itself, addition of minor % of Ni or Co retards the formation and growth of Cu3Sn intermetallic at pad-solder interface, thus minimizing the potential of void formation and failure at this IMC. It is shown that the drop performance of packages with Cu OSP (pad finish)-SnAgCuNi (solder) combination can be as good as or better than those with NiAu-SnPb combination


electronic components and technology conference | 1999

Are we over designing for solder joint reliability? Field vs. accelerated conditions, realistic vs. specified requirements

Ahmer Syed; M. Doty

The recent trend towards miniaturization is requiring engineers to look for packages which are near chip size and have finer pitch I/Os with small solder joints. Although the reliability of solder joints may not meet the field life requirements in some cases the engineer may have to select a package that is not optimum for electrical and thermal performance, may not meet size and density requirements or does not meet price targets. Faced with such a situation, an engineer is forced to ask whether the reliability requirements are realistic and if the system is being over designed to meet those requirements? This paper seeks to answer these questions. An industry survey of reliability requirements for various applications is presented, showing inconsistencies within industry groups. Various thermal cycle field conditions are discussed and a validated life prediction approach is used to determine the acceleration factors from field to accelerated test conditions. A comparison is made between realistic and specified reliability requirements for various applications to determine if the systems are being over designed. Acceleration factors for different test conditions are also presented to help sort out the published data on solder joint reliability.


electronic components and technology conference | 2007

Effect of Pb free Alloy Composition on Drop/Impact Reliability of 0.4, 0.5 & 0.8mm Pitch Chip Scale Packages with NiAu Pad Finish

Ahmer Syed; TaeSeong Kim; SeWoong Cha; Joan Scanlon; ChangGyun Ryu

Recent industry data show that the drop/impact reliability of Chip Scale Packages has been detrimentally affected by switching to SAC alloys with Ag percent equal to or greater than 3%. The primary cause of this is attributed to the higher strength and lower ductility of SAC305 and SAC405 alloys compared to SnPb solder, resulting in higher stresses at IMC layers and causing interfacial failures. While previous study [1] focused on Cu OSP finish for the packages, the study reported here is a comprehensive collection of data for NiAu pad finish using various solder alloys. The alloys considered had Ag percent varying from 1.0 to 3.0%, Cu % from 0.1 to 0.7%, and small amount of Ni, In, Co, and Ge addition to the main SAC system. Metallurgical studies were performed on identifying the IMCs and their growth with time and temperature for these alloys. Additionally, a number of board level drop tests (JESD22-B111) were performed on 0.4, 0.5, and 0.8 mm pitch CSP devices using different ball sizes and solder alloys. Finally, the data was compared against the optimum Pb free alloy solution for Cu OSP substrates. The results show that while three element SAC alloy is sufficient of NiAu surface finish, the Ag content has to reduce to gain appreciable increase in drop performance. The effect of Cu % alone in solder alloy was not found to be significant for drop performance improvement. Also, the Sn1.2Ag0.5Cu0.05Ni alloy that worked best for Cu OSP finish [1] did not perform as good as Sn1.0Ag0.5Cu alloy for NiAu finish.


IEEE Transactions on Components and Packaging Technologies | 2005

Mechanical, thermal, and electrical analysis of a compliant interconnect

Jesse Galloway; Ahmer Syed; WonJoon Kang; Jin-Young Kim; J. Cannis; YunHyeon Ka; Seungmo Kim; TaeSeong Kim; GiSong Lee; SangHyun Ryu

Ball grid array (BGA) package styles use solder balls as electrical interconnects between packages and application boards. Solder balls are rigid and tend to fracture under thermal fatigue and/or shock loading. Metalized polymer spheres (MPS) offer a more compliant interconnect, compared to solder balls, thereby increasing the thermal cycling fatigue life. A reduction in thermal and electrical performance may be expected for MPS interconnects as a result of its higher thermal and electrical resistances. A 5% and an 8% increase in MPS thermal resistance was measured for a carrier array ball grid array (CABGA) package and a plastic ball grid array (PBGA) package, respectively, compared to eutectic solder balls. However, this small reduction was offset by large gains in the solder joint life. A 1.6 times increase in the mean thermal fatigue life was measured for a CABGA using MPS interconnects compared to eutectic solder balls. A first-order model showed that eutectic solder balls provide greater process margins, compared to MPS interconnects, due to the ball collapse during reflow.

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