Ajay Bhoolokam

30.1 8b Thin-film microprocessor using a hybrid oxide-organic complementary technology with inkjet-printed P 2 ROM memory

We present an 8b general-purpose microprocessor realized in a hybrid oxide-organic complementary thin-film technology. The n-type transistors are based on a solution-processed n-type metal-oxide semiconductor, and the p-type transistors use an organic semiconductor. As compared to previous work utilizing unipolar logic gates [1], the higher mobility n-type semiconductor and the use of complementary logic allow for a >50x speed improvement. It also adds robustness to the design, which allowed for a more complex and complete standard cell library. The microprocessor consists of two parts, a processor core chip and an instruction generator. The instructions are stored in a Write-Once-Read-Many (WORM) memory formatted by a post-fabrication inkjet printing step, called Print-Programmable Read-Only Memory (P2ROM). The entire processing was performed at temperatures compatible with plastic foil substrates, i.e., at or below 250°C [2].

High-Performance a-IGZO Thin Film Diode as Selector for Cross-Point Memory Application

We present amorphous indium-gallium-zinc oxide Schottky diodes with unprecedented current densities of 104 and 105 A/cm2 at forward biases of 1.5 and 5 V, respectively. The diode presents a high rectification ratio of 1010 at ±2 V, which is essential for suppressing the sneak current of not-selected cells in the memory array. In addition, we show that the diode complies with the demanding performance of memory applications. The device degradation, given by a 30% reduction of its forward current after 104 s of continuous bias stress or 109 pulses cycles, was studied via I-V and C-V measurements and can be attributed to trapping of electrons at deep acceptor levels, which increases the diode built-in potential. Finally, we show that the device is stable upon thermal stress at 300 °C for 1 h, which opens the possibility of further processing and integration with the memory cell.

Low-temperature formation of source–drain contacts in self-aligned amorphous oxide thin-film transistors

We demonstrated self-aligned amorphous-Indium-Gallium-Zinc-Oxide (a-IGZO) thin-film transistors (TFTs) where the source–drain (S/D) regions were made conductive via chemical reduction of the a-IGZO via metallic calcium (Ca). Due to the higher chemical reactivity of Ca, the process can be operated at lower temperatures. The Ca process has the additional benefit of the reaction byproduct calcium oxide being removable through a water rinse step, thus simplifying the device integration. The Ca-reduced a-IGZO showed a sheet resistance (RSHEET) value of 0.7 kΩ/sq., with molybdenum as the S/D metal. The corresponding a-IGZO TFTs exhibited good electrical properties, such as a field-effect mobility (μFE) of 12.0 cm2/(V s), a subthreshold slope (SS−1) of 0.4 V/decade, and an on/off current ratio (ION/OFF) above 108.

Back-channel-etch amorphous indium–gallium–zinc oxide thin-film transistors: The impact of source/drain metal etch and final passivation

We report on the impact of source/drain (S/D) metal (molybdenum) etch and the final passivation (SiO2) layer on the bias-stress stability of back-channel-etch (BCE) configuration based amorphous indium–gallium–zinc oxide (a-IGZO) thin-film transistors (TFTs). It is observed that the BCE configurations TFTs suffer poor bias-stability in comparison to etch-stop-layer (ESL) TFTs. By analysis with transmission electron microscopy (TEM) and energy dispersive spectroscopy (EDS), as well as by a comparative analysis of contacts formed by other metals, we infer that this poor bias-stability for BCE transistors having Mo S/D contacts is associated with contamination of the back channel interface, which occurs by Mo-containing deposits on the back channel during the final plasma process of the physical vapor deposited SiO2 passivation.

Deep-level transient spectroscopy on an amorphous InGaZnO4 Schottky diode

The first direct measurement is reported of the bulk density of deep states in amorphous IGZO (indium-gallium-zinc oxide) semiconductor by means of deep-level transient spectroscopy (DLTS). The device under test is a Schottky diode of amorphous IGZO semiconductor on a palladium (Pd) Schottky-barrier electrode and with a molybdenum (Mo) Ohmic contact at the top. The DLTS technique allows to independently measure the energy and spatial distribution of subgap states in the IGZO thin film. The subgap trap concentration has a double exponential distribution as a function energy, with a value of ∼10 19 cm-3 eV-1 at the conduction band edge and a value of ∼1017 cm-3 eV-1 at an energy of 0.55 eV below the conduction band. Such spectral distribution, however, is not uniform through the semiconductor film. The spatial distribution of subgap states correlates well with the background doping density distribution in the semiconductor, which increases towards the Ohmic Mo contact, suggesting that these two properties share the same physical origin. cop. 2014 AIP Publishing LLC.

Analysis of frequency dispersion in amorphous In–Ga–Zn–O thin-film transistors

It is shown in this paper that the finite resistance of the accumulation channel in amorphous In–Ga–Zn–O thin-film transistors (a-IGZO TFTs) is the main cause of the frequency dispersion of the capacitance–voltage curves in these devices. A transmission line model, accounting for the distributed nature of channel resistance, is used to explain this. Multi-frequency analysis techniques for trap density distribution use a lumped series resistance model and attribute dispersion solely to the charging and discharging of trap states. As the resistance–capacitance (RC) time constant values of the IGZO TFTs are in the range of 10–100 µs, a distributed RC network is better suited for the measured frequency range (1 kHz–1 MHz).

Conduction mechanism in amorphous InGaZnO thin film transistors

We validate a model which is a combination of multiple trapping and release and percolation model for describing the conduction mechanism in amorphous indium gallium zinc oxide (a-IGZO) thin film transistors (TFT). We show that using just multiple trapping and release or percolation model is insufficient to explain TFT behavior as a function of temperature. We also show the intrinsic mobility is dependent on temperature due to scattering by ionic impurities or lattice. In solving the Poisson equation to find the surface potential and back potential as a function of gate voltage, we explicitly allow for the back surface to be floating, as is the case for a-IGZO transistors. The parameters for gap states, percolation barriers and intrinsic mobility at room temperature that we extract with this comprehensive model are in good agreement with those extracted in literature with partially-complete models. cop. 2016 The Japan Society of Applied Physics.

Impact of etch stop layer on negative bias illumination stress of amorphous indium gallium zinc oxide transistors

In this work we show that the negative bias illumination stress (NBIS) of amorphous Indium Gallium Zinc Oxide (a-IGZO) transistors with an etch stop layer (ESL) deposited by physical vapor deposition (PVD) is substantially better than the NBIS of devices where the ESL layer is deposited by plasma enhanced chemical vapor deposition (PECVD). Both devices show similar transistor characteristics and bias stress in the dark but under NBIS conditions at 425 nm, PVD ESL based transistors show much less threshold voltage shift. The reduction in deep defects due to passivation by PVD layer is responsible for improved performance under NBIS.