Adrian Vaisman Chasin

High-performance a-In-Ga-Zn-O Schottky diode with oxygen-treated metal contacts

High-performance Schottky diodes based on palladium blocking contacts were fabricated upon depositing indium-gallium-zinc oxide (IGZO) with high oxygen content. We find that an oxygen treatment of the palladium contact is needed to achieve low off currents in the Schottky diode, and rationalize this by relating an increased oxygen content at the Pd/IGZO interface to a lower interfacial trap density. Optimized IGZO films were obtained with a record high ratio of free charge carrier density to subgap traps. The rectification ratios of diodes with such films are higher than 107 with current densities exceeding 103 A/cm2 at low forward bias of 2 V.

Gate-all-around MOSFETs based on vertically stacked horizontal Si nanowires in a replacement metal gate process on bulk Si substrates

We report on gate-all-around (GAA) n- and p-MOSFETs made of 8-nm-diameter vertically stacked horizontal Si nanowires (NWs). We show that these devices, which were fabricated on bulk Si substrates using an industry-relevant replacement metal gate (RMG) process, have excellent short-channel characteristics (SS = 65 mV/dec, DIBL = 42 mV/V for LG = 24 nm) at performance levels comparable to finFET reference devices. The parasitic channels below the Si NWs were effectively suppressed by ground plane (GP) engineering.

High-Performance a-IGZO Thin Film Diode as Selector for Cross-Point Memory Application

We present amorphous indium-gallium-zinc oxide Schottky diodes with unprecedented current densities of 104 and 105 A/cm2 at forward biases of 1.5 and 5 V, respectively. The diode presents a high rectification ratio of 1010 at ±2 V, which is essential for suppressing the sneak current of not-selected cells in the memory array. In addition, we show that the diode complies with the demanding performance of memory applications. The device degradation, given by a 30% reduction of its forward current after 104 s of continuous bias stress or 109 pulses cycles, was studied via I-V and C-V measurements and can be attributed to trapping of electrons at deep acceptor levels, which increases the diode built-in potential. Finally, we show that the device is stable upon thermal stress at 300 °C for 1 h, which opens the possibility of further processing and integration with the memory cell.

Bidirectional Communication in an HF Hybrid Organic/Solution-Processed Metal-Oxide RFID Tag

A bidirectional communication protocol allows radio-frequency identification (RFID) tags to have readout of multiple tags in the RF field without collision of data. In this paper, we realized bidirectional communication between a reader system and thin-film RFID tag by introducing a novel protocol for the uplink communication. Amplitude modulation on the 13.56-MHz base carrier is used to transmit the uplink clock, whereas the data is modulated by varying pulsewidths on this clock. The technology for the thin-film RFID tags combines metal-oxide n-type transistors with organic p-type transistors resulting in a hybrid complementary technology flow. The design of the RFID tag comprises of two metal-oxide transistor rectifiers and a comparator to decode the data transmitted by the reader and different code generators that send 8 bits or 96 bits to the reader.

Back-channel-etch amorphous indium–gallium–zinc oxide thin-film transistors: The impact of source/drain metal etch and final passivation

We report on the impact of source/drain (S/D) metal (molybdenum) etch and the final passivation (SiO2) layer on the bias-stress stability of back-channel-etch (BCE) configuration based amorphous indium–gallium–zinc oxide (a-IGZO) thin-film transistors (TFTs). It is observed that the BCE configurations TFTs suffer poor bias-stability in comparison to etch-stop-layer (ESL) TFTs. By analysis with transmission electron microscopy (TEM) and energy dispersive spectroscopy (EDS), as well as by a comparative analysis of contacts formed by other metals, we infer that this poor bias-stability for BCE transistors having Mo S/D contacts is associated with contamination of the back channel interface, which occurs by Mo-containing deposits on the back channel during the final plasma process of the physical vapor deposited SiO2 passivation.

An Integrated a-IGZO UHF Energy Harvester for Passive RFID Tags

We present an ultrahigh frequency energy harvester based on low temperature processed a-IGZO (amorphous indium-gallium-zinc oxide) semiconductor on a glass substrate. The harvester is composed of a dipole antenna, matching network, and a double half-wave rectifier and is capable of delivering more than 1 Vdc at a distance of 2 m from the transmitter antenna. In the proposed wireless system, this sensitivity corresponds to 2.75-m distance harvesting at 4-W (36 dBm) emitted power from a base station, which is within EPC regulations. The main element of the rectifier is the high-performance a-IGZO Schottky diode on glass, with a rectification ratio of 107 at ±1 V, a low threshold voltage of 0.6 V and a cutoff frequency of 3 GHz at 0 V bias.

Vertically stacked gate-all-around Si nanowire CMOS transistors with dual work function metal gates

We report on the CMOS integration of vertically stacked gate-all-around (GAA) silicon nanowire MOSFETs, with matched threshold voltages (Vt, sat ∼ 0.35 V) for N- and P-type devices. The Vt setting is enabled by nanowire-compatible dual-work-function metal integration in a high-k last replacement metal gate process. Furthermore, we demonstrate that N- and P-type junction formation can influence nanowire release differently due to both implantation-induced SiGe/Si intermixing and doping effects. These findings underline that junction formation and nanowire release require co-optimization in GAA CMOS technologies.

Flexible NAND-Like Organic Ferroelectric Memory Array

We present a memory array of organic ferroelectric field-effect transistors (OFeFETs) on flexible substrates. The OFeFETs are connected serially, similar to the NAND architecture of flash memory, which offers the highest memory density of transistor memories. We demonstrate a reliable addressing scheme in this architecture, without the need for select or access transistors. As proof of principle, a 1 × 4 NAND-like string is fabricated and characterized. Retention up to one month and endurance up to 2500 cycles are shown. Read and write disturb measurements show that the memory array can potentially be scaled up to 8 kbits.

Deep-level transient spectroscopy on an amorphous InGaZnO4 Schottky diode

The first direct measurement is reported of the bulk density of deep states in amorphous IGZO (indium-gallium-zinc oxide) semiconductor by means of deep-level transient spectroscopy (DLTS). The device under test is a Schottky diode of amorphous IGZO semiconductor on a palladium (Pd) Schottky-barrier electrode and with a molybdenum (Mo) Ohmic contact at the top. The DLTS technique allows to independently measure the energy and spatial distribution of subgap states in the IGZO thin film. The subgap trap concentration has a double exponential distribution as a function energy, with a value of ∼10 19 cm-3 eV-1 at the conduction band edge and a value of ∼1017 cm-3 eV-1 at an energy of 0.55 eV below the conduction band. Such spectral distribution, however, is not uniform through the semiconductor film. The spatial distribution of subgap states correlates well with the background doping density distribution in the semiconductor, which increases towards the Ohmic Mo contact, suggesting that these two properties share the same physical origin. cop. 2014 AIP Publishing LLC.

Analysis of frequency dispersion in amorphous In–Ga–Zn–O thin-film transistors

It is shown in this paper that the finite resistance of the accumulation channel in amorphous In–Ga–Zn–O thin-film transistors (a-IGZO TFTs) is the main cause of the frequency dispersion of the capacitance–voltage curves in these devices. A transmission line model, accounting for the distributed nature of channel resistance, is used to explain this. Multi-frequency analysis techniques for trap density distribution use a lumped series resistance model and attribute dispersion solely to the charging and discharging of trap states. As the resistance–capacitance (RC) time constant values of the IGZO TFTs are in the range of 10–100 µs, a distributed RC network is better suited for the measured frequency range (1 kHz–1 MHz).