Aki Launiainen

Architectures for the sum of absolute differences operation

Efficient architectures for computing the sum of absolute differences (SAD) between two data sets are proposed in application to motion estimation in a mobile video coding system. The proposed architectures combine and further develop advantages of two earlier proposed architectures. As a result, higher performance is achieved despite the lower cost (gate count and power consumption) as compared to a conventional architecture. Proposed architectures are feasible for integrating into mobile video processing systems. They support not only regular, data independent motion estimation strategies but all of those based on the SAD criterion. Early termination mechanisms included into the proposed architecture allow one to avoid unnecessary computations which may often take place in conventional SAD architectures without such mechanisms.

A method for designing high-radix multiplier-based processing units for multimedia applications

Multifunctional architecture for video and image processing (MAVIP) to be used in multimedia systems are proposed. MAVIP is a family of reconfigurable architectures derived from a single high-radix (4, 8, or 16) multiplier structure where: a) the list of potential partial products obtained at the first stage of multiplication may be reused; b) pipeline stages may be parallelised at different level to achieve required clock frequency and to improve balancing between these stages; and c) interconnections between the operational blocks may be multiplexed to make the structure multifunctional and to allow reusing basic multiplier blocks. The same device may operate either as a programmable processing unit with digital signal processor-specific operations or as a reconfigurable ASIC. Being small, MAVIP indicates competitive performance in video coding applications.

Red eye detection using color and shape

Red eye artifact caused by flash is a common problem in consumer photography. The artifact can be avoided by certain flash techniques, but the use of image processing algorithms has proved to be an efficient approach for the detection and correction of the red eyes in the images. In this paper, we present a novel method for an automatic detection of red eyes in the image. The method is based on the localization of red regions in the image, after which the special character of each candidate region is inspected based on shape analysis. Once the candidate regions have been detected, they are classified into red eyes and other regions based on specific classification rules. In the experiments, a wide set of digital photographs containing red eyes in different conditions and circumstances have been used. The results reveal that the method is able to detect relatively accurately the red eyes in the images, and it provides robustness and fastness required in the mobile devices. Also the rate of false positive detections is low.

A Family of Accelerators for Matrix-Vector Arithmetics Based on High-Radix Multiplier Structures

A methodology for designing processor architectures oriented to matrix-vector operations is proposed in this paper. The methodology is based on high-radix multiplication where first a list of potential partial products (PPs) of one operand with all possible t-bit numbers (t∈ { 2, 3, 4 } ) are computed by simple shifts and additions, then selected PPs from this list are shifted and added according to t-bit slices of the other operand. Main advantage of the proposed method is that the list of potential PPs may be reused whenever one multiplicand is to be multiplied with several multipliers. Another advantage is that the hardware blocks involved for high-radix multiplication may also be used independently to implement other tasks such as parallel addition/subtractions, accumulations. This allows introducing a group of modifications to high-radix multiplier structures making them reconfigurable so that single devices having two-fold functionalities of either programmable processors or reconfigurable hardware accelerators may be designed.

A radix-8 multiplier design and its extension for efficient implementation of imaging algorithms

In our previous work, general principles to develop efficient architectures for matrix-vector arithmetics and video/image processing were proposed based on high-radix (4,8, or 16) multiplier extensions. In this work, we propose a radix-8 multiplier design and its extension to Multifunctional Architecture for Video and Image Processing (MAVIP). MAVIP may operate either as a programmable unit with DSP-specific operations such as multiplication, multiply-accumulate, parallel addition or as one or another HWA such as matrix-vector multiplier, FIR filter, or sum-of-absolute-difference accelerator. Simulations indicate that being a small device, MAVIP has competitive performance in video coding.