Akio Nakayama

Semiconductor memory device comprising capacitor portions having stacked structures

Semiconductor memory device having redundant circuit and method of testing to see whether or not redundant circuit is used therein

SUBSTRATE BIAS GENERATING DEVICE AND OPERATING METHOD THEREOF

Substrate bias voltage generating circuit including an internal frequency divider and driven by an externally applied clock signal

Semiconductor memory device and method for controlling its output

Display device, manufacturing method thereof and method of mending breakage of line in display device

Semiconductor memory with redundancy circuit - has standby memory cell field whose cells can replace respective normal cells and has external signal indicating state of selection controller

Halbleiterspeichereinrichtung und Verfahren zum Bestimmen der Benutzung eines Ersatzspeicherzellenfeldes

Method of mending breakage of line in display device

Display device, its manufacturing method and its discontinuity reparing method