Yutaka Ikeda

Semiconductor integrated circuit device having an internal power supply circuit capable of stably maintaining output level against load fluctuation

Semiconductor memory device allowing selection of the number of sense amplifiers to be activated simultaneously

Semiconductor memory device capable of fast testing without externally considering address scramble or data scramble

DLL circuit that can prevent erroneous operation

Constant current/constant voltage generation circuit with reduced noise upon switching of operation mode

Circuit for decreasing current consumption in data output circuit in case one of two supply voltages fails

Semiconductor memory device and method for controlling its output

Output circuit of semiconductor memory device

Semiconductor memory device capable of suppressing degradation in operation speed after replacement with redundant memory cell

SEMICONDUCTOR DEVICE WITH REDUCED ERROR OPERATION CAUSED BY THRESHOLD VOLTAGE VARIATION