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Dive into the research topics where Akira Kuroyanagi is active.

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Featured researches published by Akira Kuroyanagi.


international symposium on power semiconductor devices and ic's | 2005

Floating island and thick bottom oxide trench gate MOSFET (FITMOS) - a 60V ultra low on-resistance novel MOSFET with superior internal body diode

Hidefumi Takaya; Kyosuke Miyagi; Kimimori Hamada; Yasushi Okura; Norihito Tokura; Akira Kuroyanagi

A MOSFET structure named FITMOS has been successfully developed and exhibits record-low loss in the 60 volt breakdown voltage range. The device has a body diode with superior reverse recovery characteristics and exhibits an extremely small value for RonQgd. The distinctive feature of this device is the use of floating islands formed by self-alignment and trench gates with a thick oxide layer on the bottom. This structure can also be used for the terminal portion of the device, so the increase in the number of fabrication process steps is less than 5%. Moreover, the rate of non-defective-gates in 3-by-4-mm rectangular devices on an 8-inch wafer is at least 98%.


international symposium on power semiconductor devices and ic's | 2006

High Performance and Reliability Trench Gate Power MOSFET With Partially Thick Gate Oxide Film Structure (PTOx-TMOS)

Takaaki Aoki; Yukio Tsuzuki; Shoji Miura; Yoshifumi Okabe; Mikimasa Suzuki; Akira Kuroyanagi

We have developed a novel trench-gate MOSFET (TMOS) with partially thick gate oxide film structure (PTOx) performing lower dissipation and higher reliability. The PTOx structure consists of thick oxide around trench top (Ttt), thin oxide at trench side (Tts), and thick oxide at trench bottom (Ttb), and is formed by our original simple process characterized by remaining SiN film in trench side oxide. We found out the optimum thickness in Ttb in terms of maximum drain breakdown voltage (Vdss), and the thickness of Ttb is 2 to 3 times larger than that of Tts. For 250V device, optimum thickness of Ttb is 150nm, while Tts is 60nm. We clarified Ron*Qgd reductions of PTOx-TMOS for wide blocking voltage range up to 250V for the first time. Estimated Ron*Qgd reductions compared with conventional devices are 32% at 60V, 28% at 100V, and 25% at 250V. Fabricated PTOx-TMOS of 100V and 250V denote high performance corresponding with estimation, and stress reduction in those gate oxides against high electric field is successfully achieved and promising high reliability


Archive | 2004

Insulated gate type semiconductor device and manufacturing method thereof

Hidefumi Takaya; Kimimori Hamada; Akira Kuroyanagi; Yasushi Okura; Norihito Tokura


Archive | 2005

Insulated Gate Semiconductor Device and Method for Producing the Same

Hidefumi Takaya; Kimimori Hamada; Kyosuke Miyagi; Yasushi Okura; Akira Kuroyanagi; Norihito Tokura


Archive | 1991

Vertical type semiconductor device and method for producing the same

Akira Kuroyanagi; Masami Yamaoka; Yoshifumi Okabe


Archive | 2005

Insulated gate type semiconductor device and its manufacturing method

Akira Kuroyanagi; Yasutsugu Okura; Shigemi Sasaki; Hideshi Takatani; Norihito Tokura; 成実 佐々木; 康嗣 大倉; 規仁 戸倉; 秀史 高谷; 晃 黒柳


Archive | 2002

Trench gate type semiconductor device and its manufacturing method

Akira Kuroyanagi; Yasutsugu Okura; Hideshi Takatani; Norihito Tokura; 康嗣 大倉; 規仁 戸倉; 秀史 高谷; 晃 黒柳


Archive | 1996

Method of forming silicon nitride with varied hydrogen concentration

Yuji Ichikawa; Yasushi Tanaka; Yasuo Souki; Ryouichi Kubokoya; Akira Kuroyanagi; Hirohito Shioya


Archive | 1995

Semiconductor device with current detecting function and method of producing the same

Toshiaki Nishizawa; Akira Kuroyanagi; Tsuyoshi Yamamoto; Norihito Tokura


Archive | 1995

Vertical type semiconductor device and gate structure

Akira Kuroyanagi; Masami Yamaoka; Yoshifumi Okabe; Yasuaki Tsuzuki; Yutaka Tomatsu

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