Alan Blake

SOI gated resistor: CMOS without junctions

We report the fabrication of junctionless SOI MOSFETs. Such devices greatly simplify processing thermal budget and behave as regular multigate SOI transistors.

Ion-Transfer Electrochemistry at Arrays of Nanointerfaces between Immiscible Electrolyte Solutions Confined within Silicon Nitride Nanopore Membranes

Ion transfer across interfaces between immiscible liquids provides a means for the nonredox electrochemical detection of ions. Miniaturization of such interfaces brings the benefits of enhanced mass transport. Here, the electrochemical behavior of geometrically regular arrays of nanoscale interfaces between two immiscible electrolyte solutions (nanoITIES arrays) is presented. These were prepared by supporting the two electrolyte phases within silicon nitride membranes containing engineered arrays of nanopores. The nanoITIES arrays were characterized by cyclic voltammetry of the interfacial transfer of tetraethylammonium cation (TEA(+)) between the aqueous phase and the gelled organic phase. Effects of pore radius, pore center-to-center separation, and number of pores in the array were examined. The ion transfer produced apparent steady-state voltammetry on the forward and reverse sweeps at all experimentally accessible scan rates and at all nanopore array designs. However, background-subtraction of the voltammograms revealed the evolution of a peak-shaped response on the reverse sweep with increasing scan rate, indicative of pores filled with the organic phase to a certain extent. The steady-state voltammetric behavior at the nanoITIES arrays on the forward sweep for arrays with significant diffusion zone overlap between adjacent nanoITIES is indicative of the dominance of radial diffusion to interfaces at the edge of the arrays over linear diffusion to interfaces within the arrays. This implies that nanoITIES arrays, which occupy an overall area of micrometer dimensions, behave like a single microITIES of corresponding area to the nanoITIES array.

The curious case of thin-body Ge crystallization

The authors investigate the templated crystallization of thin-body Ge fin structures with high aspect ratios. Experimental variables include fin thickness and thermal treatments, with fin structures oriented in the 〈110〉 direction. Transmission electron microscopy determined that various crystal defects form during crystallization of amorphous Ge regions, most notably {111} stacking faults, twin boundaries, and small crystallites. In all cases, the nature of the defects is dependent on the fin thickness and thermal treatments applied. Using a standard 600 °C rapid-thermal-anneal, Ge structures with high aspect ratios crystallize with better crystal quality and fewer uncured defects than the equivalent Si case, which is a cause for optimism for thin-film Ge devices.

Low sheet resistance titanium nitride films by low-temperature plasma-enhanced atomic layer deposition using design of experiments methodology

A design of experiments methodology was used to optimize the sheet resistance of titanium nitride (TiN) films produced by plasma-enhanced atomic layer deposition (PE-ALD) using a tetrakis(dimethylamino)titanium precursor in a N2/H2 plasma at low temperature (250 °C). At fixed chamber pressure (300 mTorr) and plasma power (300 W), the plasma duration and N2 flow rate were the most significant factors. The lowest sheet resistance values (163 Ω/sq. for a 20 nm TiN film) were obtained using plasma durations ∼40 s, N2 flow rates >60 standard cubic centimeters per minute, and purge times ∼60 s. Time of flight secondary ion mass spectroscopy data revealed reduced levels of carbon contaminants in the TiN films with lowest sheet resistance (163 Ω/sq.), compared to films with higher sheet resistance (400–600 Ω/sq.) while transmission electron microscopy data showed a higher density of nanocrystallites in the low-resistance films. Further significant reductions in sheet resistance, from 163 Ω/sq. to 70 Ω/sq. for a 2...

A capacitive based piezoelectric AlN film quality test structure

Aluminum nitride (AlN) is a piezoelectric material that is commonly used in various MEMS applications. However, determining the properties of the thin film typically requires multiple test structures, and there are various methods for obtaining the piezoelectric properties. This paper highlights the development of a capacitive based test structure that is capable of determining the different material properties. In addition this paper compares various test methods used to determine the piezoelectric properties of AlN.

The Effects of Fabrication Process on the Performance of a CMOS Based Capacitive Humidity Sensor

Introduction There has been a great deal of research on design and fabrication of thin film humidity sensors for a wide range of applications. Several groups have reported fabrication of these devices utilizing MEMS and CMOS processes [1-3]. Measuring the moisture induced changes in the dielectric constant of a moisture sensing film is a widely used method for humidity measurement which is also compatible with integrated circuit processing. However, the choice of a process compatible sensing film as well as the effects of processing steps on the performance of sensor have been major challenges for researchers. We report design and fabrication of a capacitive humidity sensor which can be integrated as part of a standard CMOS chip. However, we focus on the issues associated with process steps on the performance of the sensor.

High aspect ratio iridescent three-dimensional metal–insulator–metal capacitors using atomic layer deposition

The authors report on the structural and electrical properties of TiN/Al2O3/TiN metal–insulator–metal (MIM) capacitor structures in submicron three-dimensional (3D) trench geometries with an aspect ratio of ∼30. A simplified process route was employed where the three layers for the MIM stack were deposited using atomic layer deposition (ALD) in a single run at a process temperature of 250 °C. The TiN top and bottom electrodes were deposited via plasma-enhanced ALD using a tetrakis(dimethylamino)titanium precursor. 3D trench devices yielded capacitance densities of 36 fF/μm2 and quality factors >65 at low frequency (200 Hz), with low leakage current densities (<3 nA/cm2 at 1 V). These devices also show strong optical iridescence which, when combined with the covert embedded capacitance, show potential for system in package (SiP) anticounterfeiting applications.

Identification of the transient stress-induced leakage current in silicon dioxide films for use in microelectromechanical systems capacitive switches

Dielectric charging at low electric fields is characterized on radio-frequency microelectromechanical systems (RF MEMS) capacitive switches. The dielectric under investigation is silicon dioxide deposited by plasma enhanced chemical vapor deposition. The switch membrane is fabricated using a metal alloy which is shown to be mechanically robust. In the absence of mechanical degradation, these capacitive switches are appropriate test structures for the study of dielectric charging in MEMS devices. Monitoring the shift and recovery of device capacitance-voltage characteristics revealed the presence of a charging mechanism which takes place across the bottom metal-dielectric interface. Current measurements on metal-insulator-metal devices confirmed the presence of interfacial charging and discharging transient currents. The field- and temperature-dependence of these currents is the same as the well-known transient stress-induced leakage current (SILC) observed in flash memory devices. A simple model was creat...

Skin insertion mechanisms of microneedle-based dry electrodes for physiological signal monitoring

This paper assesses the skin penetration mechanisms and insertion forces of a microneedle-based dry electrode for physiological signal monitoring. Using force-displacement measurements, it is shown that these ultrasharp microneedles, fabricated using a bulk micromachining process and which have tip radii as low as 50 nm, penetrate in-vivo human skin smoothly and without a measurable rupturing action. Skin staining techniques have been used to demonstrate that 95% penetration is achieved at just 20 mN per needle. These very low penetration forces facilitate the design of safe microneedle arrays and remove the requirement for applicator devices. Wearable electrode prototypes have been assembled using these arrays, and electrocardiography (ECG) recordings have been carried out to verify the functionality of the technique.

Investigating positive oxide charge in the SiO2/3C-SiC MOS system

This paper investigates the origin of the fixed positive oxide charge often experimentally observed in Metal Oxide Semiconductor (MOS) structures of SiO2 formed on cubic silicon carbide (3C-SiC). The electrical properties of MOS structures including either thermally grown SiO2 or deposited SiO2 by Plasma Enhanced Chemical Vapour Deposition (PECVD) on epitaxial 3C-SiC layers grown directly on Si are investigated. MOS structures with a range of oxide thickness values subjected to different thermal treatments were studied. It was found that both thermally grown and deposited SiO2 on 3C-SiC exhibit similar positive charge levels indicating that the charge originates from interface states at the 3C-SiC surface and not from the oxide. The nature of this surface charge in the SiO2/3C-SiC system is also discussed based on the current data and previously published results.