Paul K. Hurley

Origin and passivation of fixed charge in atomic layer deposited aluminum oxide gate insulators on chemically treated InGaAs substrates

We report experimental and theoretical studies of defects producing fixed charge within Al2O3 layers grown by atomic layer deposition (ALD) on In0.53Ga0.47As(001) substrates and the effects of hydrogen passivation of these defects. Capacitance-voltage measurements of Pt/ALD-Al2O3/n-In0.53Ga0.47As suggested the presence of positive bulk fixed charge and negative interfacial fixed charge within ALD-Al2O3. We identified oxygen and aluminum dangling bonds (DBs) as the origin of the fixed charge. First-principles calculations predicted possible passivation of both O and Al DBs, which would neutralize fixed charge, and this prediction was confirmed experimentally; postmetallization forming gas anneal removed most of the fixed charge in ALD-Al2O3.

A systematic study of (NH4)2S passivation (22%, 10%, 5%, or 1%) on the interface properties of the Al2O3/In0.53Ga0.47As/InP system for n-type and p-type In0.53Ga0.47As epitaxial layers

In this work, we present the results of an investigation into the effectiveness of varying ammonium sulphide (NH4)2S concentrations in the passivation of n-type and p-type In0.53Ga0.47As. Samples were degreased and immersed in aqueous (NH4)2S solutions of concentrations 22%, 10%, 5%, or 1% for 20 min at 295 K, immediately prior to atomic layer deposition of Al2O3. Multi-frequency capacitance-voltage (C-V) results on capacitor structures indicate that the lowest frequency dispersion over the bias range examined occurs for n-type and p-type devices treated with the 10%(NH4)2S solution. The deleterious effect on device behavior of increased ambient exposure time after removal from 10%(NH4)2S solution is also presented. Estimations of the interface state defect density (Dit) for the optimum 10%(NH4)2S passivated In0.53Ga0.47As devices extracted using an approximation to the conductance method, and also extracted using the temperature-modified high-low frequency C-V method, indicate that the same defect is pre...

Temperature and frequency dependent electrical characterization of HfO2/InxGa1−xAs interfaces using capacitance-voltage and conductance methods

Electrical properties of metal-oxide-semiconductor capacitors using atomic layer deposited HfO2 on n-type GaAs or InxGa1−xAs (x=0.53, 0.30, 0.15) epitaxial layers were investigated. Capacitance-voltage (CV) measurements indicated large temperature and frequency dispersion at positive gate bias in devices using n-type GaAs and low In content (x=0.30, 0.15) InxGa1−xAs layers, which is significantly reduced for devices using In0.53Ga0.47As. For In0.53Ga0.47As devices, the CV response at negative gate bias is most likely characteristic of an interface state response and may not be indicative of true inversion. The conductance technique on Pd/HfO2/In0.53Ga0.47As/InP shows reductions in interface state densities by In0.53Ga0.47As surface passivation and forming gas annealing (325 °C).

Si(100)–SiO2 interface properties following rapid thermal processing

An experimental examination of the properties of the Si(100)–SiO2 interface measured following rapid thermal processing (RTP) is presented. The interface properties have been examined using high frequency and quasi-static capacitance-voltage (CV) analysis of metal-oxide-silicon (MOS) capacitor structures immediately following either rapid thermal oxidation (RTO) or rapid thermal annealing (RTA). The experimental results reveal a characteristic peak in the CV response measured following dry RTO and RTA (T>800 °C), as the Fermi level at the Si(100)–SiO2 interface approaches the conduction band edge. Analysis of the QSCV responses reveals a high interface state density across the energy gap following dry RTO and RTA processing, with a characteristic peak density in the range 5.5×1012 to 1.7×1013 cm−2 eV−1 located at approximately 0.85–0.88 eV above the valence band edge. When the background density of states for a hydrogen-passivated interface is subtracted, another peak of lower density (3×1012 to 7×1012 cm...

In situ H2S passivation of In0.53Ga0.47As∕InP metal-oxide-semiconductor capacitors with atomic-layer deposited HfO2 gate dielectric

We have studied an in situ passivation of In0.53Ga0.47As, based on H2S exposure (50–350°C) following metal organic vapor phase epitaxy growth, prior to atomic layer deposition of HfO2 using Hf[N(CH3)2]4 and H2O precursors. X-ray photoelectron spectroscopy revealed the suppression of As oxide formation in air exposed InGaAs surfaces for all H2S exposure temperatures. Transmission electron microscopy analysis demonstrates a reduction of the interface oxide between the In0.53Ga0.47As epitaxial layer and the amorphous HfO2 resulting from the in situ H2S passivation. The capacitance-voltage and current-voltage behavior of Pd∕HfO2∕In0.53Ga0.47As∕InP structures demonstrates that the electrical characteristics of samples exposed to 50°C H2S at the end of the metal-organic vapor-phase epitaxy In0.53Ga0.47As growth are comparable to those obtained using an ex situ aqueous (NH4)2S passivation.

Investigation of TiO2-doped HfO2 thin films deposited by photo-CVD

Abstract TiO 2 -doped HfO 2 thin films, as potential replacements for SiO 2 as high- k gate dielectric material, have been grown by photo-induced CVD using 222 nm excimer lamps at a temperature of 400 °C. Vaporised titanium isopropoxide and hafnium (IV) tetra- t -butoxide were used as the precursors. Films from approximately 45–70 nm in thickness with refractive indices from 1.850 to 2.424 were grown with various Ti:Hf ratios. The as-deposited films were found to be amorphous by X-ray diffraction when the Ti/(Ti+Hf) value was up to 33%, while the crystalline TiO 2 anatase phase formed when the Ti/(Ti+Hf) was 41%. We also found that the refractive index increased sharply when the Ti/(Ti+Hf) was over 25%. Fourier transform infrared spectroscopy, XPS and TEM were also used to monitor as well as the presence of Ti, interface and microstructure of the films on Si-substrate. The effect of UV-annealing on the electrical properties of these films will also be discussed.

Impact of Forming Gas Annealing on the Performance of Surface-Channel

We investigated the effect of forming gas (5% H₂/95% N₂) annealing on surface-channel In_0.53 Ga_0.47As MOSFETs with atomic-layer-deposited Al₂O₃ as the gate dielectric. We found that a forming gas anneal (FGA) at 300°C for 30 min was efficient at removing or passivating positive fixed charges in Al₂O₃ , resulting in a shift of the threshold voltage from -0.63 to 0.43 V and in an increase in the <i>I</i>_on/<i>I</i>_off ratio of three orders of magnitude. Following FGA, the MOSFETs exhibited a subthreshold swing of 150 mV/dec, and the peak transconductance, drive current, and peak effective mobility increased by 29%, 25%, and 15%, respectively. FGA significantly improved the source- or drain-to-substrate junction isolation, with a reduction of two orders of magnitude in the reverse bias leakage exhibited by the Si-implanted In_0.53Ga_0.47As n⁺/p junctions, which is consistent with passivation of midgap defects in In_0.53Ga_0.47As by the FGA process.

\hbox{In}_{0.53}\hbox{Ga}_{0.47}\hbox{As}

High dielectric constant hafnium oxide films were formed by electron beam (e-beam) evaporation on HF last terminated silicon (100) wafers. We report on the influence of low energy argon plasma ( ∼ 70 eV) and oxygen flow rate on the electrical, chemical, and structural properties of metal-insulator-silicon structures incorporating these e-beam deposited HfO2 films. The use of the film-densifying low energy argon plasma during the deposition results in an increase in the equivalent oxide thickness (EOT) values. We employ high resolution transmission electron microscopy (HRTEM), x-ray photoelectron spectroscopy (XPS), and medium energy ion scattering experiments to investigate and understand the mechanisms leading to the EOT increase. We demonstrate very good agreement between the interfacial silicon oxide thicknesses derived independently from XPS and HRTEM measurements. We find that the e-beam evaporation technique enabled us to control the SiOx interfacial layer thickness down to ∼ 6 A. Very low leakage current density (<10−4 A/cm2) is measured at flatband voltage +1 V into accumulation for an estimated EOT of 10.9±0.1 A. Based on a combined HRTEM and capacitance-voltage (CV) analysis, employing a quantum-mechanical CV fitting procedure, we determine the dielectric constant (k) of HfO2 films, and associated interfacial SiOx layers, formed under various processing conditions. The k values are found to be 21.2 for HfO2 and 6.3 for the thinnest ( ∼ 6 A) SiOx interfacial layer. The cross-wafer variations in the physical and electrical properties of the HfO2 films are presented.

MOSFETs With an ALD

In this work, we present the results of an investigation into charge trapping in metal/high-k/In0.53Ga0.47As metal-oxide-semiconductor capacitors (MOS capacitors), which is analysed using the hysteresis exhibited in the capacitance-voltage (C-V) response. The availability of both n and p doped In0.53Ga0.47As epitaxial layers allows the investigation of both hole and electron trapping in the bulk of HfO2 and Al2O3 films formed using atomic layer deposition (ALD). The HfO2/In0.53Ga0.47As and Al2O3/In0.53Ga0.47As MOS capacitors exhibit an almost reversible trapping behaviour, where the density of trapped charge is of a similar level to high-k/In0.53Ga0.47As interface state density, for both electrons and holes in the HfO2 and Al2O3 films. The experimental results demonstrate that the magnitude of the C-V hysteresis increases significantly for samples which have a native oxide layer present between the In0.53Ga0.47As surface and the high-k oxide, suggesting that the charge trapping responsible for the C-V hys...

\hbox{Al}_{2}\hbox{O}_{3}

In this work, we present experimental results examining the energy distribution of the relatively high (> 1 X 10(11) cm(-2)) electrically active interface defects which are commonly observed in high-dielectric-constant (high-k) metal-insulator-silicon systems during high-k process development. This paper extends previous studies on the Si(100)/SiOx/HfO2 system to include a comparative analysis of the density and energy distribution of interface defects for HfO2, lanthanum silicate (LaSiOx), and Gd2O3 thin films on (100) orientation silicon formed by a range of deposition techniques. The analysis of the interface defect density across the energy gap, for samples which experience no H-2/N-2 annealing following the gate stack formation, reveals a peak density (similar to 2 X 10(12) cm(-2) eV(-1) to similar to 1 X 10(13) cm(-2) eV(-1)) at 0.83-0.92 eV above the silicon valence bandedge for the HfO2, LaSiOx, and Gd2O3 thin films on Si (100). The characteristic peak in the interface state density (0.83-0.92 eV) is obtained for samples where no interface silicon oxide layer is observed from transmission electron microscopy. Analysis suggests silicon dangling bond (P-bo) centers as the common origin for the dominant interface defects for the various Si(100)/SiOx/high-k/metal gate systems. The results of forming gas (H-2/N-2) annealing over the temperature range 350-555 degrees C are presented and indicate interface state density reduction, as expected for silicon dangling bond centers. The technological relevance of the results is discussed. (c) 2007 The Electrochemical Society.