Albert Bergemont

Method of making large-scale EPROM memory with a checker board pattern and an improved coupling factor

A method of manufacturing integrated circuits comprising EPROM memory and logic transistors

Floating-gate EEPROM memory with a transistor for source line selection

Method for contact between two conductive or semi-conductive layers deposited on a substrate

NON-VOLATILE MEMORY WITH FLOATING GRID AND WITHOUT THICK OXIDE

Process for manufacturing integrated circuits using EPROM memory transistors and logic transistors

Process for manufacturing integrated circuits.

Large scale integrated EPROM device having a high coupling factor

Memory in integrated circuit

Dynamic memory of the integrated circuit type