Albert Heuberger

Reliability of space-grade vs. COTS SRAM-based FPGA in N-modular redundancy

In this paper, we evaluate the suitability of different SRAM-based FPGAs for harsh radiation environments (e.g., space). In particular, we compare the space-grade and radiation-hardened by design Virtex-5QV (XQR5VFX130) with the commercial off-the-shelf Kintex-7 (KC7K325T) from Xilinx. The advantages of the latter device are: 2.5 times the resources of the space-grade FPGA, faster switching times, less power consumption, and the support of modern design tools. We focus on resource consumption as well as reliability in dependence of single event upset rates for a geostationary earth orbit satellite application, the Heinrich Hertz satellite mission. For this mission, we compare different modular redundancy schemes with different voter structures for the qualification of a digital communication receiver. A major drawback of the Kintex-7 are current-step single event latchups, which are a risk for space missions. If the use of an external voter is not possible, we suggest triple modular redundancy with one single voter at the end, whereby the Virtex-5QV in this configuration is about as reliable as the Kintex-7 in an N-modular redundancy configuration with an external high-reliable voter.

Increasing Transmission Reliability for Telemetry Systems Using Telegram Splitting

This paper analyzes the reliability and throughput of the telegram-splitting concept in the presence of inter-system and intra-system interference. Using telegram splitting, the data of one telegram is split into multiple sub-packets, which are then transmitted with temporal spacing. As a result, collisions with other telegrams destroy only some sub-packets that can be recovered using forward error correction. Consequently, the reliability of the data transmission in case of inter- and intra-system interference - a significant problem in license-exempt bands - is highly improved. In this paper, probabilities for the resulting telegram error rate of random media access systems using telegram splitting are derived. Furthermore, the achievable throughput is analyzed. The theoretical considerations in addition to simulation results prove the significant gain of the telegram-splitting concept for telemetry systems.

Detection of solar particle events inside FPGAs

The intensity of radiation in space, which is affected by the sun, can differ over five orders of magnitude within a few days. This variation is caused by shocks of fast coronal mass ejections, which drive high-energy and long-duration particle events, named solar particle events. With the knowledge of the current solar condition, operators can take countermeasures. They can save unnecessary redundancy during relaxed periods or switch the system in a safe state during a harsh period. We propose the block RAM inside the FPGA as a single-event upset sensor to detect solar particle events. The user can still access these block RAMs because we only evaluate the error signals from the error-correcting code logic. We are developing a solar condition detector including a model for statistical classification. This is based on Petri nets and we perform static as well as transient analyses to check the plausibility and to determine the detection time. By combining the evaluation of the model with the results of the implemented FPGA design, we detect the significant June 2015 solar particle event after 13.1 min (784 s), using all 298 block RAMs of a Virtex-5QV. The duration of this solar particle event was 56 h and the peak particle flux occurred after 21.6 h as energetic storm particle. We conclude, that solar particle events cause a highly dynamic radiation environment, but the onset of such high-intensity events can be detected and a response can be organized in a timely manner.

Backwards compatible improvement of the EPCglobal class 1 gen 2 standard

Radio Frequency Identification (RFID) systems with dense tag populations face the problem of tag collisions, i.e. simultaneous replies of multiple transponders in a single slot. State-of-the-art RFID readers can use two methods for resolving this collision problem. The first method bases on Dynamic Frame Slotted ALOHA (DFSA) for optimizing the frame length, which results in a reduced number of collisions. The second and more efficient method resolves collisions on the physical layer, e.g. by means of multi-antenna algorithms. However, the well-known EPCglobal class 1 gen 2 standards only allows for a single tag acknowledgment, even if the physical layer is able to identify multiple collided tags. This results in an overall reduced performance. For overcoming this drawback, we propose a system that has the capability to acknowledge multiple tags within a single slot, resulting in a significantly increased performance. Our proposal offers the benefit that it is backwards compatible with existing EPCglobal Class 1 gen 2 tags and readers. Hence, our improved tags can be read by conventional readers without affecting the performance. Furthermore, existing tags can be read simultaneously with our improved tags by optimized readers. Using our approach, we are able to increase the maximum reading efficiency compared to state-of-the-art systems by a factor of approx. 3. This can be translated into a bulk reading time reduction of 50%, which is a significant improvement w.r.t. state-of-the-art systems.

Adaptive single-event effect mitigation for dependable processing systems

For application in radiation-harsh environments, designers apply mitigation techniques according the worst-case (solar) condition to achieve a dependable design. This results in a resource overhead, which is most of the time unnecessary. To overcome this problem, adaptive mitigation techniques are used. This technique is a trade-off between two parameters, such as performance and reliability, according to different operating modes by toggling between these modes. In this context, we propose an Adaptive Single-Event Effect Mitigation (ASEEM) method. It is based on adaptive reconfiguration of an FPGA between two modes, specifically a performance mode and a high reliability mode. The performance mode offers high processing power and thus higher signal processing throughput. We evaluate ASEEM by calculating results with particle data from 2010 until 2016 for one space-grade and two commercial-grade FPGAs. Based on radiation data, we calculate upset rates, availability, performance and performability. We discuss one realization of ASEEM in detail with fixed upset rates. The examples presented in this paper show a reduction of the upset rate form a sixth to a ninth (compared with the performance mode) and the availability of the high processing power over 90 % in the considered time interval. We conclude that the investigated ASEEM realization is optimal for moderate and long mean times to repair. In a processing case study, with a fixed mean time to repair of one hour, we obtain a performability improvement of 14% and an availability improvement of 21 % over the performance mode for an FPGA using the latest semiconductor technology.

A Time and Capture Probability Aware Closed Form Frame Slotted ALOHA Frame Length Optimization

Minimizing the reading time in dense radio-frequency identification (RFID) networks is a critical issue. Commonly used RFID systems are based on frame alotted ALOHA (FSA) for tag anti-collision management. The usual approach for improved reading times with large tag populations is the optimization of the number of slots per frame. In real RFID systems, the slot duration depends on the slot type (i.e. idle, successful, or collided). In addition, collided slots might be converted to successful slots by capturing the strongest transponder, i.e. the so-called capture effect. Recent publications have proposed numerical solutions for obtaining the optimum frame length under these assumptions. The authors employ numerical solutions that require Multi-dimensional look-up tables for obtaining the optimum frame length. In this letter, we propose a closed form solution for the analytical calculation of the optimum frame length. The proposed solution gives a novel closed form equation for the frame length considering the different slot durations and the capture effect. Moreover, this letter presents a new method to calculate the capture probability per frame. Simulations indicate that the proposed solution gives accurate results for all relevant parameter configurations without any need for multi-dimensional look-up tables.

A low-cost RSSI based localization system design for wildlife tracking

We present a low cost localization system for bats tracking. The system is based on an angle-of-arrival estimation using field strength difference measurements of two directional antennas. The receivers are constructed of low-cost commercial broadcast receivers and an embedded processing platform. A concept for an efficient 2-stage differential correlation is shown to address the dynamic range limitations of the low-cost hardware, the processing power limitations and frequency offsets. We show that the dynamic range can be improved by >16dB compared to a power detection method. The full system has been validated in a field trial in the rain forest of Panama.

Low-weight wireless sensor node for animal encounter detection and dual-band localization

In this paper the feasibility of encounter detection and simultaneous localization of bats in their natural habitat is demonstrated. Furthermore a compact design of an enhanced mobile node exhibiting a weight of only 1.85 g is presented. The new design allows for an increased robustness of the localization by implementing dual-band signal transmission at 2.4GHz and in the sub-gigahertz range. The prolongation of operation time up to 14 days and beyond is discussed in detail.

Detection and Isolation of permanent faults in FPGAs with remote access

In this paper, we present a Fault Detection (FD) and Fault Isolation (FI) concept for permanent faults in SRAM-based FPGAs. Harsh environments, such as space, cause permanent faults, which results in defective hardware. Furthermore, physical inaccessible systems in such environments limit debugging capabilities. The proposed concept uses wireless remote debugging to access the remote device. The presumption of a permanent fault starts an extended hardware debugging procedure by performing off-line tests without user application. First, the FD process confirms the fault as permanent and reject temporary faults (known as static and transient). Afterwards, a fine-grain permanent FD and FI determines affected primitives in the FPGA and exclude this primitive from the FPGA design. This is realized with a customized recovery strategy for each primitive type, by blocking and bypassing these defective primitives. Focus of this paper is the feasibility of the concept.

Decoding Performance in Low-Power Wide Area Networks With Packet Collisions

This paper proposes an analytical framework for the prediction of decoding error probabilities in heterogeneous wireless environments, where transmissions from various radio nodes with distinct Poisson-arrival rates and packet lengths populate the channel. Random channel access without feedback is assumed, where partial packet collisions can lead to the loss of packets. The analysis is based on the modeling of the collision length distribution between competing nodes. With recent results from information theory in the finite block length regime, we provide bounds on achievable decoding error probabilities for a given interference scenario. The new framework enables jointly considering inter- and intra-system interference, which is an important aspect in unlicensed radio bands. The frameworks applicability to optimize system designs is demonstrated for a typical low-power wide area network scenario. We study the tradeoff between reliability and code rate for a point-to-point link and present achievable throughput regions. The analysis reveals the superior performance of coded time-hopping spread spectrum systems. They reach very low error probability even under strong interference for wide ranges of practically relevant load regions.