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Dive into the research topics where Aleksandar Beric is active.

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Featured researches published by Aleksandar Beric.


signal processing systems | 2008

A method for improving the efficiency of a two-level memory hierarchy

Radomir Jakovljevic; Aleksandar Beric

Video processing applications often use motion estimation and compensation, either to ensure high quality of output pictures in case of post processing or in many video coding standards. In case of the High Definition video format, that is picture resolution of 1920times1080 pixels, the off-chip memory bandwidth requirements are high. The typical answer to those requirements is a two-level memory hierarchy. However, in case of large search area, the on-chip memory bandwidth is still high, which has significant impact to performance and power dissipation. In this paper, we propose a method to reduce the on-chip memory bandwidth, typically by 4 times. As immediate result, performance improves by 50% or power dissipation of the two-level memory hierarchy reduces by 35%. The price for these improvements is either reduced vertical dimension of the search area or increased onchip memory capacity. In both cases the price is moderate, typically 20%.


international conference on image processing | 2008

N-meander scanning trace a method for the on-chip bandwidth reduction

Radomir Jakovljevic; Aleksandar Beric

In video processing, a multilevel memory hierarchy is a typical answer to the high off-chip bandwidth requirements. Multilevel memory hierarchies reduce the number of the off-chip memory accesses by moving them within the memory hierarchy. This results in the increased on-chip memory bandwidth, which influences the power consumption and performance. This is especially visible in applications that require large memory capacity, such as motion estimation and compensation. In this paper, we present a method to reduce the on-chip memory bandwidth, under the moderate memory capacity increase. Our method allows the trade-off between the on-chip bandwidth reduction factor (for example 4 times) and the memory capacity increase (for example 20%). With both cases, the off-chip memory bandwidth is intact. The method does not impair the algorithmic quality, which we show on the example of a high-quality motion estimation algorithm used in video post-processing. Also, the method enables higher utilization of processing resources.


Archive | 2015

High Dynamic Range Image Composition Using Multiple Images

Ivan Micovic; Aleksandar Sutic; Visnja Krsmanovic; Dusan Stevanovic; Marko Sredic; Pavle Petrovic; Dalibor Segan; Vladimir Kovacevic; Aleksandar Beric


Archive | 2014

MOTION ESTIMATION USING HIERARCHICAL PHASE PLANE CORRELATION AND BLOCK MATCHING

Aleksandar Beric; Zdravko Pantic; Vladimir Kovacevic; Radomir Jakovljevic; Milos Markovic


Journal of Real-time Image Processing | 2018

New access modes of parallel memory subsystem for sub-pixel motion estimation

Radomir Jakovljevic; Aleksandar Beric; Edwin Van Dalen; Dragan Milicev


systems communications | 2010

JPEG XR encoder implementation on a heterogeneous multiprocessor system

Dragomir M. El Mezeni; Aleksandar Beric; Edwin Van Dalen; Lazar Saranovac


signal processing systems | 2016

Block-Matching Correlation Motion Estimation for Frame-Rate up-Conversion

Vladimir B. KovaăźEvić; Zdravko Pantic; Aleksandar Beric; Radomir Jakovljevic


Archive | 2014

PIXEL-BASED WARPING AND SCALING ACCELERATOR

Dmitar Redzic; Aleksandar Beric; Edwin Van Dalen


Archive | 2012

ELECTRONIC APPARATUS HAVING PARALLEL MEMORY BANKS

Radomir Jakovljevic; Aleksandar Beric; Edwin Van Dalen; Dragan Milicev


Archive | 2015

FALLBACK DETECTION IN MOTION ESTIMATION

Vladimir Kovacevic; Zdravko Pantic; Aleksandar Beric; Milos Markovic; Vladimir Ilic

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