Alessandro Calderoni

Statistical Fluctuations in HfO x Resistive-Switching Memory: Part I - Set/Reset Variability

Resistive switching memory (RRAM) relies on the voltage-driven formation/disruption of a conductive filament (CF) across a thin insulating layer. Due to the 1-D structure of the CF and discrete nature of defects, the set and reset states of the memory device generally display statistical variability from cycle to cycle. For projecting cell downscaling and designing improved programming operations, the variability as a function of the operation parameters, such as the maximum current in the set process and maximum voltage in the reset process, need to be evaluated and understood. This paper addresses set/reset variability, presenting statistical data for HfOx-based RRAM and introducing a physics-based Monte Carlo model for switching statistics. The model can predict the distribution of the set state as a function of the compliance (maximum) current during set and distribution of the reset state as a function of the stop (maximum) voltage during reset. Numerical modeling results are finally presented to provide additional insight into discrete fluctuation events.

Statistical Fluctuations in HfOx Resistive-Switching Memory: Part II—Random Telegraph Noise

A key concern for resistive-switching random access memory (RRAM) is the read noise, due to the structural, chemical, and electrical modifications taking place at the localized current path, or conductive filament (CF). Read noise typically appears as a random telegraph noise (RTN), where the current randomly fluctuates between ON and OFF levels. This paper addresses RTN in RRAM, providing physical interpretations and models for the dependence on the programming and read conditions. First, we explain the RTN dependence on the compliance current during set transition in terms of the size-dependent depletion of carriers within the CF. Then, we discuss the bias dependence of the RTN switching times and amplitude, which can be explained by Joule heating and Poole-Frenkel barrier modifications arising from the electrostatics of the RTN fluctuating center.

Neuromorphic Learning and Recognition With One-Transistor-One-Resistor Synapses and Bistable Metal Oxide RRAM

Resistive switching memory (RRAM) has been proposed as an artificial synapse in neuromorphic circuits due to its tunable resistance, low power operation, and scalability. For the development of high-density neuromorphic circuits, it is essential to validate the state-of-the-art bistable RRAM and to introduce small-area building blocks serving as artificial synapses. This paper introduces a new synaptic circuit consisting of a one-transistor/one-resistor structure, where the resistive element is a HfO2 RRAM with bipolar switching. The spike-timing-dependent plasticity is demonstrated in both the deterministic and stochastic regimes of the RRAM. Finally, a fully connected neuromorphic network is simulated showing online unsupervised pattern learning and recognition for various voltages of the POST spike. The results support bistable RRAM for high-performance artificial synapses in neuromorphic circuits.

A copper ReRAM cell for Storage Class Memory applications

Hybrid memory systems that incorporate Storage Class Memory (SCM) as non-volatile cache or DRAM data backup are expected to bolster system efficiency and cost because SCM promises higher density than DRAM cache and higher speed than the storage I/F. This paper demonstrates a Cu-based resistive random access memory (ReRAM) cell that meets the SCM performance specifications for a 16Gb ReRAM with 200MB/s write and 1GB/s read [1].

Understanding switching variability and random telegraph noise in resistive RAM

A deeper understanding of the noise and variability sources in resistive switching memory (RRAM) is needed for device improvement and scaling down. To meet this challenge, this work addresses switching statistics and read noise in RRAM. First, an analytical model for resistance variability in set and reset states is presented. Then, random telegraph noise (RTN) is discussed in terms of trap-induced depletion in the conductive filament (CF) The model accounts for size-dependent RTN, while bias-dependent RTN is explained by Poole-Frenkel (PF) transport and Joule heating in atomic-size CFs.

Voltage-Controlled Cycling Endurance of HfO x -Based Resistive-Switching Memory

Resistive-switching memory (RRAM) based on metal oxide is currently considered as a possible candidate for future nonvolatile storage and storage-class memory. To explore possible applications of RRAM, the switching variability and the cycling endurance are key issues that must be carefully understood. To this purpose, we studied the switching variability and the endurance in pulsed regime for HfOx-based RRAM. We found that the resistance window, the set/reset variability, and the endurance are all controlled by the maximum voltage Vstop, which is applied during the negative-reset operation. We demonstrate that the endurance failure is triggered by a negative-set event, where the resistance suddenly decreases during the reset. Cycling endurance is studied as a function of time, compliance current and Vstop, allowing to develop an Arrhenius-law model, which is capable of predicting device lifetime under various conditions.

Performance comparison of O-based and Cu-based ReRAM for high-density applications

The resistive switching memory (ReRAM) landscape encompasses several cell technology options. Filamentary systems that employ oxygen ion motion (O-ReRAM) or metal ion motion (M-ReRAM) and systems that employ uniform oxygen ion motion are being widely studied as potential candidates for next generation of non-volatile memory systems (NVM). While comparisons between different systems have been made at single-cell level, enabling a future NVM technology mandates an evaluation of a statistically significant population of bits. This paper presents an array-level comparison of two filamentary systems: O-ReRAM and Cu ion based M-ReRAM. The key factors for enabling a manufacturable product are compared, such as read window, noise, variability, endurance and retention.

Physical Unbiased Generation of Random Numbers With Coupled Resistive Switching Devices

The resistive-switching memory (RRAM) is currently under consideration for fast nonvolatile memory thanks to its relatively low cost and high performance. A key concern for RRAM reliability is stochastic switching, which impacts the operation of the digital memory due to distribution broadening. On the other hand, stochastic behaviors are enabling mechanisms for some computing tasks, such as physical unclonable function (PUF) and random number generation (RNG). Here, we present new circuit blocks for physical RNG, based on the coupling of two RRAM devices. The two-resistance scheme allows to overcome the need of probability tracking, where the operation voltage must be tuned to adjust the generation probabilities of 0 and 1. Probability tests are proved successful for one of the three proposed schemes.

Process integration of a 27nm, 16Gb Cu ReRAM

A 27nm 16Gb Cu based NV Re-RAM chip has been demonstrated. Novel process introduction to enable this technology include a Damascene Cell, Line-SAC Digit Lines filled with Cu, exhumed-silicided array contacts, raised epitaxial arrays, and high-drive buried access devices.

Modeling nand Flash Memories for IC Design

In this letter, we present a compact model of NAND flash memory strings for circuit simulation purposes. This model is modular and easy to be implemented, and its parameters can be extracted through a simple procedure. It allows accurate simulation of NAND flash memories with a limited computational effort, taking into account capacitive coupling effects which will become extremely important in future technology generations. This model is a very valuable tool for IC designers to optimize NVM circuits, particularly in multilevel applications.