Alexantrou Serb

Emulating short-term synaptic dynamics with memristive devices

Neuromorphic architectures offer great promise for achieving computation capacities beyond conventional Von Neumann machines. The essential elements for achieving this vision are highly scalable synaptic mimics that do not undermine biological fidelity. Here we demonstrate that single solid-state TiO2 memristors can exhibit non-associative plasticity phenomena observed in biological synapses, supported by their metastable memory state transition properties. We show that, contrary to conventional uses of solid-state memory, the existence of rate-limiting volatility is a key feature for capturing short-term synaptic dynamics. We also show how the temporal dynamics of our prototypes can be exploited to implement spatio-temporal computation, demonstrating the memristors full potential for building biophysically realistic neural processing systems.

Real-time encoding and compression of neuronal spikes by metal-oxide memristors

Advanced brain-chip interfaces with numerous recording sites bear great potential for investigation of neuroprosthetic applications. The bottleneck towards achieving an efficient bio-electronic link is the real-time processing of neuronal signals, which imposes excessive requirements on bandwidth, energy and computation capacity. Here we present a unique concept where the intrinsic properties of memristive devices are exploited to compress information on neural spikes in real-time. We demonstrate that the inherent voltage thresholds of metal-oxide memristors can be used for discriminating recorded spiking events from background activity and without resorting to computationally heavy off-line processing. We prove that information on spike amplitude and frequency can be transduced and stored in single devices as non-volatile resistive state transitions. Finally, we show that a memristive device array allows for efficient data compression of signals recorded by a multi-electrode array, demonstrating the technologys potential for building scalable, yet energy-efficient on-node processors for brain-chip interfaces.

A

Selectorless crossbar arrays of resistive randomaccess memory (RRAM), also known as memristors, conduct large sneak currents during operation, which can significantly corrupt the accuracy of cross-point analog resistance (Mt) measurements. In order to mitigate this issue, we have designed, built, and tested a memristor characterization and testing (mCAT) instrument that forces redistribution of sneak currents within the crossbar array, dramatically increasing Mt measurement accuracy. We calibrated the mCAT using a custom-made 32 × 32 discrete resistive crossbar array, and subsequently demonstrated its functionality on solid-state TiO2-x RRAM arrays, on wafer and packaged, of the same size. Our platform can measure standalone Mt in the range of 1 kΩ to 1 MΩ with <;1% error. For our custom resistive crossbar, 90% of devices of the same resistance range were measured with <;10% error. The platforms limitations have been quantified using large-scale nonideal crossbar simulations.

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The resistance switching dynamics of TiN/HfO2/Pt devices is analyzed in this paper. When biased with a voltage ramp of appropriate polarity, the devices experience SET transitions from high to low resistance states in an abrupt manner, which allows identifying a threshold voltage. However, we find that the stimulation with trains of identical pulses at voltages near the threshold results in a gradual SET transition, whereby the resistive state visits a continuum of intermediate levels as it approaches some low resistance state limit. On the contrary, RESET transitions from low to high resistance states proceed in a gradual way under voltage ramp stimulation, while gradual resistance changes driven by trains of identical spikes cover only a limited resistance window. The results are discussed in terms of the relations among the thermo-electrochemical effects of Joule heating, ion mobility, and resistance change, which provide positive and negative closed loop processes in SET and RESET, respectively. Furthermore, the effect of the competition between opposite tendencies of filament dissolution and formation at opposite metal/HfO2 interfaces is discussed as an additional ingredient affecting the switching dynamics.

-Controller-Based System for Interfacing Selectorless RRAM Crossbar Arrays

Research on memory devices is a highly active field, and many new technologies are being constantly developed. However, characterizing them and understanding how to bias for optimal performance are becoming an increasingly tight bottleneck. Here, we propose a novel technique for extracting biasing parameters, conducive to desirable switching behavior in a highly automated manner, thereby shortening the process development cycles. The principle of operation is based on: 1) applying variable amplitude, pulse-mode stimulation on a test device in order to induce switching multiple times; 2) collecting the data on how pulsing parameters affect the devices resistive state; and 3) choosing the most suitable biasing parameters for the application at hand. The utility of the proposed technique is validated on TiOx-based prototypes, where we demonstrate the successful extraction of biasing parameters that allow the operation of our devices both as multistate and binary resistive switches.

Experimental study of gradual/abrupt dynamics of HfO2-based memristive devices

Devices that exhibit resistive switching are promising components for future nanoelectronics with applications ranging from emerging memory to neuromorphic computing and biosensors. In this brief, we present an algorithm for identifying switchable devices, i.e., devices that can be programmed in distinct resistive states and that change their state predictably and repeatedly in response to input stimuli. The method is based on extrapolating the statistical significance of difference in between two distinct resistive states as measured from devices subjected to standardized bias protocols. The test routine is applied on distinct elements of 32×32 resistive-random-access-memory (RRAM) crossbar arrays and yields a measure of device switchability in the form of a statistical significance p-value. Ranking devices by p-value shows that switchable devices are typically found in the bottom 10% and are therefore easily distinguishable from nonfunctional devices. Implementation of this algorithm dramatically cuts RRAM testing time by granting fast access to the best devices in each array, as well as yield metrics.

An RRAM Biasing Parameter Optimizer

Reduction in metal-oxide thin films has been suggested as the key mechanism responsible for forming conductive phases within solid-state memory devices, enabling their resistive switching capacity. The quantitative spatial identification of such conductive regions is a daunting task, particularly for metal-oxides capable of exhibiting multiple phases as in the case of TiOx. Here, we spatially resolve and chemically characterize distinct TiOx phases in localized regions of a TiOx–based memristive device by combining full-field transmission X-ray microscopy with soft X-ray spectroscopic analysis that is performed on lamella samples. We particularly show that electrically pre-switched devices in low-resistive states comprise reduced disordered phases with O/Ti ratios around 1.37 that aggregate in a ~100 nm highly localized region electrically conducting the top and bottom electrodes of the devices. We have also identified crystalline rutile and orthorhombic-like TiO2 phases in the region adjacent to the main reduced area, suggesting that the temperature increases locally up to 1000 K, validating the role of Joule heating in resistive switching. Contrary to previous studies, our approach enables to simultaneously investigate morphological and chemical changes in a quantitative manner without incurring difficulties imposed by interpretation of electron diffraction patterns acquired via conventional electron microscopy techniques.

A Cell Classifier for RRAM Process Development

Titanium oxide (TiOx) has attracted a lot of attention as an active material for resistive random access memory (RRAM), due to its versatility and variety of possible crystal phases. Although existing RRAM materials have demonstrated impressive characteristics, like ultra-fast switching and high cycling endurance, this technology still encounters challenges like low yields, large variability of switching characteristics, and ultimately device failure. Electroforming has been often considered responsible for introducing irreversible damage to devices, with high switching voltages contributing to device degradation. In this paper, we have employed Al doping for tuning the resistive switching characteristics of titanium oxide RRAM. The resistive switching threshold voltages of undoped and Al-doped TiOx thin films were first assessed by conductive atomic force microscopy. The thin films were then transferred in RRAM devices and tested with voltage pulse sweeping, demonstrating that the Al-doped devices could on average form at lower potentials compared to the undoped ones and could support both analog and binary switching at potentials as low as 0.9 V. This work demonstrates a potential pathway for implementing low-power RRAM systems.

Spatially resolved TiOx phases in switched RRAM devices using soft X-ray spectromicroscopy

Emerging nanoionic memristive devices are considered as the memory technology of the future and have been winning a great deal of attention due to their ability to perform fast and at the expense of low-power and -space requirements. Their full potential is envisioned that can be fulfilled through their capacity to store multiple memory states per cell, which however has been constrained so far by issues affecting the long-term stability of independent states. Here, we introduce and evaluate a multitude of metal-oxide bi-layers and demonstrate the benefits from increased memory stability via multibit memory operation. We propose a programming methodology that allows for operating metal-oxide memristive devices as multibit memory elements with highly packed yet clearly discernible memory states. These states were found to correlate with the transport properties of the introduced barrier layers. We are demonstrating memory cells with up to 6.5 bits of information storage as well as excellent retention and power consumption performance. This paves the way for neuromorphic and non-volatile memory applications.

Engineering the switching dynamics of TiOx-based RRAM with Al doping

In recent years, biologically inspired systems, which emulate the nervous system of living beings, are becoming more and more requested due to their ability to solve ill-posed problems such as pattern recognition or interaction with the external environment. By virtue of their nanoscaled size and their tunable conductance, memristors are key elements to emulate high-density networks of biological synapses that regulate the communication efficacy among neurons and implement learning capability. We propose a TiN/ HfO2/Ti/TiN memristor as artificial synapse for neuromorphic architectures. The device can gradually change its conductance upon application of proper electrical stimuli. More specifically, it features gradual potentiation and depression when stimulated by trains of identical potentiating or depressing spikes, which are easy to be implemented on-chip. Moreover, we demonstrate that the memristor conductance can be regulated according to the delay time between two spikes incoming to the device terminals. This regulation of memristor conductance implements the typical biological learning process named Spike-Time-Dependent-Plasticity (STDP). Finally, collected STDP data were used to simulate a simple fully connected Spiking Neural Network (SNN) for pattern recognition.