Radu Berdan

Unsupervised learning in probabilistic neural networks with multi-state metal-oxide memristive synapses

In an increasingly data-rich world the need for developing computing systems that cannot only process, but ideally also interpret big data is becoming continuously more pressing. Brain-inspired concepts have shown great promise towards addressing this need. Here we demonstrate unsupervised learning in a probabilistic neural network that utilizes metal-oxide memristive devices as multi-state synapses. Our approach can be exploited for processing unlabelled data and can adapt to time-varying clusters that underlie incoming data by supporting the capability of reversible unsupervised learning. The potential of this work is showcased through the demonstration of successful learning in the presence of corrupted input data and probabilistic neurons, thus paving the way towards robust big-data processors.

Emulating short-term synaptic dynamics with memristive devices

Neuromorphic architectures offer great promise for achieving computation capacities beyond conventional Von Neumann machines. The essential elements for achieving this vision are highly scalable synaptic mimics that do not undermine biological fidelity. Here we demonstrate that single solid-state TiO2 memristors can exhibit non-associative plasticity phenomena observed in biological synapses, supported by their metastable memory state transition properties. We show that, contrary to conventional uses of solid-state memory, the existence of rate-limiting volatility is a key feature for capturing short-term synaptic dynamics. We also show how the temporal dynamics of our prototypes can be exploited to implement spatio-temporal computation, demonstrating the memristors full potential for building biophysically realistic neural processing systems.

A

Selectorless crossbar arrays of resistive randomaccess memory (RRAM), also known as memristors, conduct large sneak currents during operation, which can significantly corrupt the accuracy of cross-point analog resistance (Mt) measurements. In order to mitigate this issue, we have designed, built, and tested a memristor characterization and testing (mCAT) instrument that forces redistribution of sneak currents within the crossbar array, dramatically increasing Mt measurement accuracy. We calibrated the mCAT using a custom-made 32 × 32 discrete resistive crossbar array, and subsequently demonstrated its functionality on solid-state TiO2-x RRAM arrays, on wafer and packaged, of the same size. Our platform can measure standalone Mt in the range of 1 kΩ to 1 MΩ with <;1% error. For our custom resistive crossbar, 90% of devices of the same resistance range were measured with <;10% error. The platforms limitations have been quantified using large-scale nonideal crossbar simulations.

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In this paper, we investigate the AC performance of a variable gain amplifier that utilizes an in-house manufactured memristor as a gain setting element. Analysis includes frequency and phase responses as the memristor is programmed at different resistive states. A TiO2-based solid-state memristor was employed in the feedback branch of an inverting voltage amplifier and was programmed externally. We have also observed indications of memcapacitive effects and a correlation with resistive states is presented. We demonstrate that our TiO2 memristive devices, although possessing relatively low ROFF/RON switching ratios (∼10), are versatile and can be used reliably in programmable gain amplifiers.

-Controller-Based System for Interfacing Selectorless RRAM Crossbar Arrays

Realizing large-scale circuits utilizing emerging nanoionic devices known as memristors depends on the accurate modeling of their behavior under a wide range of biasing conditions. Currently, no available SPICE memristor model accounts for both nonvolatile and volatile resistive switching characteristics, the coexistence of which has been recently demonstrated to manifest on practical ReRAM. In this letter, we present a new memristor SPICE model that introduces volatile effects, which can render a rate-dependent bipolar nonvolatile switching operation. The model is demonstrated via a number of simulation cases and is benchmarked against measured results acquired by solid-state TiO2 ReRAM.

Memristive devices as parameter setting elements in programmable gain amplifiers

In this study, we exploit the non-zero crossing current–voltage characteristics exhibited by nanoscale TiO2 based solid-state memristors. We demonstrate that the effective resistance and capacitance of such two terminal devices can be modulated simultaneously by appropriate voltage pulsing. Our results prove that both resistive and capacitive switching arise naturally in nanoscale Pt/TiO2/Pt devices under an external bias, this behaviour being governed by the formation/disruption of conductive filaments through the TiO2 thin film.

A Memristor SPICE Model Accounting for Volatile Characteristics of Practical ReRAM

This work exploits the switching dynamics of nanoscale resistive random access memory (ReRAM) cells with particular emphasis on the origin of the observed variability when cells are consecutively cycled/programmed at distinct memory states. It is demonstrated that this variance is a common feature of all ReRAM elements and is ascribed to the formation and rupture of conductive filaments that expand across the active core, independently of the material employed as the active switching core, the causal physical switching mechanism, the switching mode (bipolar/unipolar) or even the unit cells’ dimensions. Our hypothesis is supported through both experimental and theoretical studies on TiO2 and In2O3 : SnO2 (ITO) based ReRAM cells programmed at three distinct resistive states. Our prototypes employed TiO2 or ITO active cores over 5 × 5 µm 2 and 100 × 100 µm 2 cell areas, with all tested devices demonstrating both unipolar and bipolar switching modalities. In the case of TiO2-based cells, the underlying switching mechanism is based on the non-uniform displacement of ionic species that foster the formation of conductive filaments. On the other hand, the resistive switching observed in the ITO-based devices is considered to be due to a phase change mechanism. The selected experimental parameters allowed us to demonstrate that the observed programming variance is a common feature of all ReRAM devices, proving that its origin is dependent upon randomly oriented local disorders within the active core that have a substantial impact on the overall state variance, particularly for high-resistive states.

Pulse-induced resistive and capacitive switching in TiO2 thin film devices

Devices that exhibit resistive switching are promising components for future nanoelectronics with applications ranging from emerging memory to neuromorphic computing and biosensors. In this brief, we present an algorithm for identifying switchable devices, i.e., devices that can be programmed in distinct resistive states and that change their state predictably and repeatedly in response to input stimuli. The method is based on extrapolating the statistical significance of difference in between two distinct resistive states as measured from devices subjected to standardized bias protocols. The test routine is applied on distinct elements of 32×32 resistive-random-access-memory (RRAM) crossbar arrays and yields a measure of device switchability in the form of a statistical significance p-value. Ranking devices by p-value shows that switchable devices are typically found in the bottom 10% and are therefore easily distinguishable from nonfunctional devices. Implementation of this algorithm dramatically cuts RRAM testing time by granting fast access to the best devices in each array, as well as yield metrics.

Origin of the OFF state variability in ReRAM cells

An FPGA-based instrument with capabilities of on-board oscilloscope and nanoscale pulsing (70 ns @ ±10 V) is presented, thus allowing exploration of the nano-scale switching of RRAM devices. The system possesses less than 1% read-out error for resistance range between 1 kΩ to 1 MΩ, and demonstrated its functionality on characterizing solid-state prototype RRAM devices on wafer; devices exhibiting gradual switching behavior under pulsing with duration spanning between 30 ns to 100 μs. The data conversion error-induced degradation on read-out accuracy is studied extensively and verified by standard linear resistor measurements. The integrated oscilloscope capability extends the versatility of our instrument, rendering a powerful tool for processing development of emerging memory technologies but also for testing theoretical hypotheses arising in the new field of memristors.

A Cell Classifier for RRAM Process Development

A practical system for reading out from linear, multi-level, selectorless Resistive Random Access Memory (RRAM) arrays based on a Trans-Impedance Amplifier (TIA) approach is presented and studied. SPICE simulation of the core of the system is performed in order to extract predicted sensitivity to error factors such as non-zero TIA offsets and access resistance. A physical implementation of the system is then tested on a small, 12 × 12 reference array and measured results show its ability to decode absolute resistive states in the range of 1 kΩ-220 kΩ within ≈ 11% tolerance.