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Featured researches published by Alexis Grabbe.


Metrology, Inspection, and Process Control for Microlithography XVIII | 2004

Approaching new metrics for wafer flatness: an investigation of the lithographic consequences of wafer non-flatness

John Francis Valley; Noel Poduje; Jaydeep K. Sinha; Neil H. Judell; Jie Wu; Marc Boonman; Sjef Tempelaars; Youri van Dommelen; Hans Kattouw; Jan Hauschild; William Hughes; Alexis Grabbe; Les Stanton

Flatness of the incoming silicon wafer is one major contributor to the ultimate focusing limitation of modern exposure tools. Exposure tools are designed to chuck wafers without creating non-flatness and then use focus control to follow as closely as possible the chucked wafer front surface topography. The smaller size of the exposure slit in a step-and-scan exposure tool, as compared to the previous generation full-field stepper tool, helps minimize the impact of chucked wafer non-flat topography. However, to maintain high throughput and improve critical dimension uniformity (CDU) at sub-wavelength line-widths requires continuous improvement in the incoming silicon wafer flatness. In this paper we report extensive experimental results that review existing wafer flatness metrics and propose the addition of a new metric. The new metric emulates the scanning motion of exposure by integrating the defocus that each point on the wafer experiences during exposure. We show that this method is in better spatial agreement with measured defocus in step-and-scan exposure tools. Simple metrics of moving average (MA) defocus prediction analysis will be defined and shown to correlate very well to post exposure defocus data. These experiments were enabled by the creation of special 300-nm wafers by MEMC. These special wafers include sites with a wide variation in flatness. Prior to exposure the wafers were measured with a high-resolution optical flatness metrology tool (WaferSight by ADE) to obtain industry standard thickness variation (flatness) data. Incoming wafer flatness data is used to predict wafer suitability for lithography at the desired device geometry node (e.g., 90 nm). The flatness data was processed and characterized using both standard metrics (SFQR) and the new MA analysis. The relationship between the industry standard metric (SFQR) and similar metrics applied to MA analysis will be presented. Full two-dimensional maps are used to present spatial correlations and permit simple physical insights into the flatness data sets. Measurements of chucked wafer flatness were made on the same wafers using ASML TWINSCAN in-line metrology. These measurements correlate very well to thickness-based flatness. Un-chucked wafer flatness metrics (SFQR and MA) are shown to correlate well to post exposure defocus data when an appropriate site size is used. This result is discussed in relationship to the industry-accepted practice of specifying un-chucked wafer flatness. Lithography performance tests were made to prove the relevance of the different flatness metrics. The same special wafers are used for lithography performance tests. These tests achieve excellent correlation between post-exposure full-wafer focus control results and predictions based on both SFQ (industry standard) and MA re-mapping of the flatness data. The relationship between measured critical dimension (CD) and defocus is also explored. Point-by-point analysis of CD residual versus measured defocus data nicely follows a Bossung curve. We also show that residual CD values predicted from defocus correlate well with measured values. These experiments confirm the application of industry standard wafer flatness measurements to step-and-scan lithography when appropriately using current metrics. They also present the potential for improved metrics based on the MA defocus prediction analysis to help drive continuous improvement of wafer flatness for advanced step-and-scan lithography.


Solid State Phenomena | 2012

Indirect Ultra-Pure Water Metals Analysis by Extended Ion Exchange on a Silica Surface

Larry W. Shive; Hai He Liang; Alexis Grabbe; Sasha Joseph Kweskin

Water purity is not taken for granted in the Semiconductor Industry. Ultra high purity water (UPW) is analyzed continuously in-line for particles and resistivity. Routine samples are automatically taken for total organic carbon (TOC), boron, silica and dissolved oxygen. Less routine analyses, such as metals, are done off-line. Metal content of UPW water is well below the detection limits of ICP-MS even with a pre-concentration step. As a result, metals content may vary in the water without being detected. These variations may affect device performance and yield while the root cause may go undetected.


Archive | 2001

Method and apparatus for processing a semiconductor wafer using novel final polishing method

Alexis Grabbe; Mick Bjelopavlic; Ashley S. Hull; Michele L. Haler; Guoqiang Zhang; Henry F. Erk; Yun-Biao Xin


Archive | 2009

Methods to recover and purify silicon particles from saw kerf

Alexis Grabbe; Tracy M. Ragan


Archive | 2005

Silicon wafer etching process and composition

Mark G. Stinson; Henry F. Erk; Guoqiang Zhang; Mick Bjelopavlic; Alexis Grabbe; Jozef G. Vermeire; Judith A. Schmidt; Thomas E. Doane; James R. Capstick


Archive | 2002

Solution composition and process for etching silicon

Alexis Grabbe; Thomas E. Doane


Archive | 2014

Methods for producing silane

Puneet Gupta; Henry F. Erk; Alexis Grabbe


Archive | 2012

Methods for reducing the metal content in the device layer of SOI structures and SOI structures produced by such methods

Alexis Grabbe; Lawrence P. Flannery


Archive | 2013

Methods For The Recycling of Wire-Saw Cutting Fluid

Alexis Grabbe; Sasha Joseph Kweskin; Larry W. Shive; Henry F. Erk


Archive | 2011

METHODS TO SLICE A SILICON INGOT

Alexis Grabbe; Tracy M. Ragan

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