Ali Hayek

Implementation of a 1oo2-RISC-architecture on FPGA for safety systems

Nowadays embedded systems are increasingly used in industrial applications. FPGAs are being used in complex roles in critical systems. The purpose of this paper is to present the basic ideas behind the building of safety related loo2 system on FPGA platform. Since systems with a single processor (loo1) provide cost effective inputs with a safety integrity rating of SIL1 2, a dual architecture (loo2) which provide high safety integrity to a rating of SIL 3, is presented. In the first part the complete design of a simple FPGA 16 bit RISC processor and a system on-chip design in synthesizable VHDL is presented and the safety demands for the loo2 architecture is given. In the second half of the paper, the implementation of the RISC architecture and of the loo2 architecture and some running applications are shown.

Design and implementation of an IP-core based safety-related communication architecture on FPGA

Nowadays embedded systems are increasingly used in industrial applications. On the other hand, Intellectual Properties ldquoIPsrdquo are being used in complex roles in such systems. The purpose of this paper is to present the basic ideas behind the building of an IP-based safety-related 1oo2 architecture on FPGA platform. In the first part the complete design of a simple IP-based 8 bit RISC processor and a system on-chip (SoC) design in synthesizable VHDL on FPGA-platform is presented and the safety parameters for the 1oo2 (one out of two) architecture are given. In the second part of the paper, the implementation of the single and of the 1oo2 communication architecture and some results such as a running application are shown.

SRAM-based FPGA design techniques for safety related systems conforming to IEC 61508 a survey and analysis

With the announcement and development of safety standards such as IEC 61508 and DO-254 standards a basis for the implementation of qualitative and quantitative analyzes in the areas of reliability and safety for electronic safety-related systems was laid. Especially with the publication of the second edition of the standard IEC 61508 standard and the introduction of new aspects such as on-chip redundancy and the use of integrated systems in such systems is becoming increasingly attractive. SRAM-based FPGAs are considered as the mainstream FPGA technology and represent an excellent platform for the development of system-on-chips due to their complexity and programming flexibility. In this paper, the implementation of FPGA-based safety-related systems according to the standard IEC 61508 is targeted. First, the advantages and challenges of FPGAs for the use in such systems are presented. Afterwards, measures and methodologies are discussed, which are required for the implementation of such systems. Finally suitable FPGA implementation of these measures is presented.

Basic VHDL tests conforming to IEC 61508

The development of embedded sensing applications based on integrated circuits leads to ever-growing complexity of VHDL-code and requires sophisticated testability to achieve high diagnostic coverage. The norm IEC 61508 provides a set of requirements for the implementation of safety-related software. This paper deals with the testing of VHDL modules according to IEC 61508. Since VHDL is a hardware description language and differs from traditional software languages, new testing aspects and common coverage criteria are examined with respect to basic needs resulting from those differences. Therefore, a development process according to the V-Model is introduced and a classification of VHDL modules is proposed, providing a basis on which several testing methods and exit-criteria can be evaluated with respect to specific design attributes common for each class.

Patient vital signs monitoring via android application

This paper presents a system that is able to monitor the patient vital signs (Heart Rate, SPO2, NIBP, ECG, temperature and respiration rate) and send them continuously to the doctors android phone device. The system enables multiple patients to be connected to the same doctor. Within the system, the health care professional may activate/deactivate any of the vital signs sensors. He can also set a prescription for the patient, schedule a meeting,... When bad activities are received, a message is directly sent to the doctor and to the patient relatives in order to alert them. Note that the Bluetooth connection is used to send/receive data between the patient platform and its android system. The tested results showed an almost error free system with an accuracy above 95% and a few milliseconds delay between the vital signs reading and their upload over the server.

Safety chips in light of the standard IEC 61508: Survey and analysis

With the release of the second edition of the standard IEC 61508 for functional safety of electrical, electronic and programmable electronic systems, a set of methodologies and implementation techniques was presented, which allows the realization and certification of safety-related solutions with on-chip redundancy. In a broader context, the standard ISO 26262 offers similar methodologies for safety solutions for automotive applications. The main focus of the research work of our institute is laid on the development and certification of safety-chips according to the standard IEC 61508. Together with an industrial partner, we are developing chip-based safety-related solutions for several industrial applications. In the same context, several semiconductor manufacturers addressed the development of such solutions in the last years, mainly with the focus on automotive applications. The present paper provides an overview of existing and planned safety chip architectures. Furthermore, a cursory analysis of the presented safety-chips is carried out with respect to the standard IEC 61508. A deep qualitative and quantitative analysis require experiments and simulations which will be carried out in future work.

HICore1: “Safety on a chip” turnkey solution for industrial control

In this paper a complete safety controller on a single chip is presented. HICore 1 is a comprehensive solution that includes a certified application specific integrated circuit for safety-critical applications according to the safety standard IEC 61508, meeting the safety integrity level SIL3. It also meets the requirements of the standard EN 13849 Performance Level e. A SIL3 operating system and a SIL3 middleware complement the presented safety chip solution. Based on the presented solution, the smallest certified safety controller represents an innovative product and allows system manufacturers to create safe solutions ready for certification.

The benefits of middleware for safety-related systems-on-chip

System-on-Chip architectures are increasingly designed for safety-related purposes. As a very high level of interlocking of hard- and software is required for such specialized systems, different concepts for the software composition are necessary. This paper investigates the benefits resulting from the utilization of a middleware which handles all low-level hardware access demanded by the application. Several measures recommended by standard IEC 61508 are implemented “quasi-automatically” if a certified middleware is used. In addition, the certification effort is drastically decreased if the implementation of main functionalities is based on certified, reused components. Another “side-effect” is the hiding of details concerning the system-on-chip and the operating system as the application always uses the middleware interfaces.

Evaluation and analysis of an on-chip safety system architecture

Due to the continuing development of semiconductor structures, it can be allowed nowadays to integrate faster and more efficient systems into a very small area of silicon. In such system-on-chip, all individual components of a target control system can be integrated into a single silicon die at lowest level, which in turn contributes in saving the substantial space and reduces power consumption and production costs. With the consideration of the miniaturization of safety-related systems into system-on-chips, where usually complete redundant architectures along with memories and interfaces are integrated into small silicon structures, many advantages can be taken into account. These advantages extend to all levels of the development cycle. In the present paper, a concept for on-chip safety system architecture is presented briefly. Primarily, a qualitative evaluation and analysis of the presented architecture is explicitly focused and discussed. The evaluation and analysis is based on a comparison to a similar conventional discrete safety-related architecture.

Network-based safety-related vibration and position analysis for railway vehicles

Nowadays, many considerable efforts are focused on the development of efficient and effective systems that increase the productivity of vehicles by controlling and manipulating the extraordinary states, such as sliding and spinning, during the operational time. Those states play a central role in the performance of the vehicles described as an interaction among different mechanical parts regarding their life-time, their wear and tear, as well as the maintenance costs. In addition, these states ultimately affect the safety of target system and its environment. Therefore, the necessity of avoiding, controlling, or manipulating these states to lower their effects into a tolerable level has become the major driver for conducting the current research work. In this paper, a prototype for safety-related platform for detecting and controlling railway vehicles states by means of vibration capture is presented. Additionally, test procedures in order to collect the vibration data related to each state are presented; these tests were performed under the supervision of an industrial partner. Moreover, the recognized initial patterns of the vibration signals related to the studied states are also introduced.