Josef Börcsök

Estimation and Evaluation of Common Cause Failures

Success of many modern applications is highly dependent on the correct functioning of complex computer based systems. In some cases, failures in these systems may cause serious consequences in terms of loss of human life. Systems in which failure could endanger human life are termed safety-critical. The SIS (safety instrumented system) should be designed to meet the required safety integrity level as defined in the safety requirement specification (safety requirement allocation). Moreover, the SIS design should be performed in a way that minimizes the potential for common mode or common cause failures (CCF). A CCF occurs when a single fault result in the corresponding failure of multiple components. Thus, CCFs can result in the SIS failing to function when there is a process demand. Consequently, CCFs have to be identified during the design process and the potential impact on the SIS functionality have to be understood. This paper gives details about the estimation and evaluation of common failures and assesses a loo2 system. It is a survey paper that presents the newest developments in common cause failure analysis.

Implementation of a 1oo2-RISC-architecture on FPGA for safety systems

Nowadays embedded systems are increasingly used in industrial applications. FPGAs are being used in complex roles in critical systems. The purpose of this paper is to present the basic ideas behind the building of safety related loo2 system on FPGA platform. Since systems with a single processor (loo1) provide cost effective inputs with a safety integrity rating of SIL1 2, a dual architecture (loo2) which provide high safety integrity to a rating of SIL 3, is presented. In the first part the complete design of a simple FPGA 16 bit RISC processor and a system on-chip design in synthesizable VHDL is presented and the safety demands for the loo2 architecture is given. In the second half of the paper, the implementation of the RISC architecture and of the loo2 architecture and some running applications are shown.

A survey on OPC and OPC-UA: About the standard, developments and investigations

In 1996, a new standard was announced that should serve as a software interface to exchange process data and to solve the problem to exchange process data using different industrial protocols and communication systems. A successful story started since then with few additional standards like the Alarm and Event standard using the OPC approach and some revisions and new editions. Ten years later a new approach was created that unified all existing standards and was also concerned with e.g. interoperability, security and web-based systems. This paper details the different OPC standards, tries to answer the question why this standard is important for industries and academia and where current research and development utilising those standards.

Principle software reliability analysis with different failure rate models

This paper explains the principles of software reliability models. Furthermore, the objective of this study is to illustrate the differences between a finite- and infinite failure rate models concerning software reliability. It also covers assumptions for each failure rate models.

Design and implementation of an IP-core based safety-related communication architecture on FPGA

Nowadays embedded systems are increasingly used in industrial applications. On the other hand, Intellectual Properties ldquoIPsrdquo are being used in complex roles in such systems. The purpose of this paper is to present the basic ideas behind the building of an IP-based safety-related 1oo2 architecture on FPGA platform. In the first part the complete design of a simple IP-based 8 bit RISC processor and a system on-chip (SoC) design in synthesizable VHDL on FPGA-platform is presented and the safety parameters for the 1oo2 (one out of two) architecture are given. In the second part of the paper, the implementation of the single and of the 1oo2 communication architecture and some results such as a running application are shown.

Software development for safety-related systems

Safety-related systems mostly comprise hardware and software solutions. Due to the increasing application of complex hardware and software systems, the software systems have to be considered regarding safety as well as hardware systems. The development of a safety-related software system is similar to the development of a safety-related hardware systems. But there are still no generally accepted methods for developing safety-critical software. One has to use the methods, which fit best to the actual requirements. However, the calculation of reliability and availability for safety-related software systems is far more complex.

SRAM-based FPGA design techniques for safety related systems conforming to IEC 61508 a survey and analysis

With the announcement and development of safety standards such as IEC 61508 and DO-254 standards a basis for the implementation of qualitative and quantitative analyzes in the areas of reliability and safety for electronic safety-related systems was laid. Especially with the publication of the second edition of the standard IEC 61508 standard and the introduction of new aspects such as on-chip redundancy and the use of integrated systems in such systems is becoming increasingly attractive. SRAM-based FPGAs are considered as the mainstream FPGA technology and represent an excellent platform for the development of system-on-chips due to their complexity and programming flexibility. In this paper, the implementation of FPGA-based safety-related systems according to the standard IEC 61508 is targeted. First, the advantages and challenges of FPGAs for the use in such systems are presented. Afterwards, measures and methodologies are discussed, which are required for the implementation of such systems. Finally suitable FPGA implementation of these measures is presented.

Basic VHDL tests conforming to IEC 61508

The development of embedded sensing applications based on integrated circuits leads to ever-growing complexity of VHDL-code and requires sophisticated testability to achieve high diagnostic coverage. The norm IEC 61508 provides a set of requirements for the implementation of safety-related software. This paper deals with the testing of VHDL modules according to IEC 61508. Since VHDL is a hardware description language and differs from traditional software languages, new testing aspects and common coverage criteria are examined with respect to basic needs resulting from those differences. Therefore, a development process according to the V-Model is introduced and a classification of VHDL modules is proposed, providing a basis on which several testing methods and exit-criteria can be evaluated with respect to specific design attributes common for each class.

Different approaches for probability of common cause failure on demand calculations for safety integrity systems

The common cause failures (ccf) are the biggest part when calculating the probability of failure for redundant safety integrity systems. A ccf can occur, when a random hardware failure leads to a failure of several components. There are several methods to calculate the probability of ccf. Three models will be shown in this paper, with the help of which the beta-factor will be calculated. The ccf ratio for the calculation of the overall probability of failure is defined with the beta-factor.

Patient vital signs monitoring via android application

This paper presents a system that is able to monitor the patient vital signs (Heart Rate, SPO2, NIBP, ECG, temperature and respiration rate) and send them continuously to the doctors android phone device. The system enables multiple patients to be connected to the same doctor. Within the system, the health care professional may activate/deactivate any of the vital signs sensors. He can also set a prescription for the patient, schedule a meeting,... When bad activities are received, a message is directly sent to the doctor and to the patient relatives in order to alert them. Note that the Bluetooth connection is used to send/receive data between the patient platform and its android system. The tested results showed an almost error free system with an accuracy above 95% and a few milliseconds delay between the vital signs reading and their upload over the server.