Alireza Kasnavi

Analytical modeling of crosstalk noise waveforms using Weibull function

To analyze the failure of a CMOS circuit due to glitches induced by capacitive crosstalk, noise immunity curves (a.k.a. noise rejection curve) must be characterized. However, noise waveform models currently used for characterization such as ideal triangle and trapezoid can underestimate the propagated noise pulse by over 20% and result in missed violations. We provide an analytical solution to fit any given crosstalk noise waveform to a Weibull function, which can generate identical propagated glitch heights compared to SPICE, resulting in accurate noise immunity curves.

An Efficient Method for Fast Delay and SI Calculation Using Current Source Models

Current source models are the methods of choice for gate-level delay and SI calculation in Deep Sub Micron regime. To fully utilize the information provided by the current source models, numerical integration is often applied to solve stage-based transient simulation that calculates delay, slew, or noise bumps. However, this is computationally expensive. In this paper, we present a fast and robust algorithm for delay and signal integrity (SI) calculation using current source models. By applying diagonalization and Sherman-Morrison formula together with a one-step Newton-Raphson method, the transient simulation cost of a stage with a single driver can be reduced from O(kmn3) to O(kn) with a small runtime overhead, where k is the number of time step, m is the average number of Newton-Raphson steps, and n is the size of matrices of the Reduced Order Model(ROM) of the parasitic network. The proposed method works perfectly with the popular implicit integration methods such as the Trapezoidal and Backward Euler method.

Fast Sequential Cell Noise Immunity Characterization Using Meta-stable Point of Feedback Loop

Noise glitches can cause functional errors or failures if they are latched into sequential cells. Thus it is very important to determine or characterize noise failure criteria of sequential cells. However, characterizing noise failure criteria of sequential cells is very computationally expensive because it often requires multiple transient simulations with different clock waveform shapes and alignments, known as clock sweeping. In this paper, we propose a new technique that eliminates the clock sweeping by using the meta-stable point of sequential cells. Our experiments with industrial circuits have shown that the proposed method is on average 58times faster than the conventional clock sweeping method and its average error is only 2.4%

A general piece-wise nonlinear library modeling format and size reduction technique for gate-level timing, SI, power, and variation analysis

Standard cell libraries are used extensively in CMOS digital circuit designs. In the past ten years, standard cell library size has increased by more than 10X. Reducing the library size is becoming a must.

Fast Crosstalk Repair by Quick Timing Change Estimation

Post route crosstalk repair is a difficult process and often requires significant manual intervention. Since repairing crosstalk for one net may cause new timing violations on other nets, the repair process might not converge. This often makes automation process of crosstalk repair difficult. In this paper, we formulate crosstalk repair process as an integer linear programming (ILP). Then, we propose a fast and efficient heuristic algorithm that minimizes the number of repairs by quickly estimating and predicting new timing information to choose the best candidate. Our experiments with industrial designs have shown excellent crosstalk repair results without any manual intervention