Amin Sallem

Optimizing CMOS LNA circuits through multi-objective meta heuristics

Particle swarm optimization (PSO) has shown to be an efficient, robust and simple optimization algorithm. Recently, the mono-objective version of the PSO algorithm was adapted and used to optimize only one performance of RF circuits, mainly the voltage gain of low noise amplifiers. In this work, we propose to optimize more than one performance function of LNAs while satisfying imposed and inherent constraints. We deal with generating the Pareto front linking two conflicting performances of a LNA, namely the voltage gain and the noise figure. The adopted idea consists of using the symbolic expressions of the scattering parameters ((S21) for the voltage gain, and (S11, S22) for input and output matching). For this purpose we use a Multi-Objective Optimization algorithm PSO incorporating the mechanism of the crowding distance technique (MOPSO-CD). Comparisons with results obtained using NSGA II are presented and ADS simulations, using 0.35µm CMOS technology, are given to show good reached results.

Analogue Circuit Optimization through a Hybrid Approach

Optimal analogue circuit sizing is investigated in this chapter. It is shown that hybridization of a global optimization approach with a local one leads to better results in optimization of such circuits, than using classical approaches. The case of merging Genetic Algorithms with the Simulated Annealing technique is considered. The hybrid algorithm is detailed and is evaluated using test functions. It is shown through three application examples, i.e. optimization of performances of a current conveyor, an operational transconductance amplifier and a low noise amplifier, that such hybrid algorithms yield optimal solutions in a much shorter time, when compared to conventional meta-heuristics.

Simulation-based optimization of CCIIs' performances in weak inversion

Analog circuits operating in the weak inversion region of the transistors are being used as an ideal option for low power CMOS design. In this paper, we present three optimized CMOS second generation current conveyors (CCIIs) operating in the weak inversion region. Simulation-based approach is adopted to assist an optimization algorithm that is also presented in this brief. HSPICE simulations are presented to show good reached performances.

Application of the PSO technique to the Optimization of CMOS Operational Transconductance Amplifiers

In this paper, we investigate the Optimizing Operational Transconductance Amplifiers through the constrained Particle Swarm Optimization (PSO). We optimize the folded cascode OTA performances, namely the static gain, the transition frequency, the common mode rejection ratio (CMRR) and the positive power-supply rejection ratio (PSRR). A comparaison with two other optimization methods shows good reached performances. The optimized circuit is used to design a 2nd order Biquad Gm-C low-pass filter.

Simulation-based multi-objective optimization of current conveyors: Performance evaluations

Multi-objective metaheuristics are over and over again used by analog designers. Pareto fronts linking conflicting parameters are usually generated using different optimisation techniques. Conclusions on these fronts are generally made in a subjective manner; no performance measures are used! In this paper we deal with the use of two metrics, namely the C-metric and the hypervolume indicator. The simulation-based technique is used to generate the non-dominated set of points of the Pareto fronts. Two current mode circuits are considered: a conventional and a differential CMOS current conveyor. The used metrics are detailed, their utility is highlighted, and the results are discussed.

Optimizing CMOS current conveyors through meta heuristics

In this paper, three Meta heuristics are investigated to optimize analog circuit; namely Genetic Algorithms, Particle Swarm Optimization and Simulated Annealing. A particular interest is given to the optimization of performances of current conveyors. SPICE Simulation results are given to show viability of the reached optimal results.

A hybrid approach for the sensitivity analysis of integrated inductors

This paper proposes a hybrid methodology for the evaluation of integrated inductors sensitivity against technological/geometrical parameters variation. The obtained results are used in an optimization-based design environment for integrated inductors, as a way of guaranteeing that obtained solutions are robust against parameter variation. For the inductor characterization, a lumped element model is used, where each element value is evaluated through physics based equations. The sensitivity of the inductor characterization to parameter variations is evaluated at two levels. At the physical level, the sensitivity of the model element values to technological/geometrical parameters variations is computed through an equation-based strategy. Then, the sensitivity of the inductor characterization to the model parameter variations is obtained through a simulation-based approach, where the Richardson extrapolation technique is used for the calculation of the partial derivatives. Several examples considering the evaluation of sensitivity of both inductance and quality factor of two inductors in UMC130 technology are presented. Obtained results are compared against Monte-Carlo simulations. Hybrid methodology for the evaluation of integrated inductors sensitivity analysis.Technological/geometrical parameters variation evaluation.For the inductor characterization a lumped element model is used.The sensitivity is evaluated at two levels; physical and elements level.At the physical level the sensitivity is computed through an equation-based strategy.At the element level the sensitivity is obtained through a simulation-based approach.The Richardson extrapolation technique is applied at the element level.

A Multi-objective Simulation Based Tool: Application to the Design of High Performance LC-VCOs

The continuing size reduction of electronic devices imposes design challenges to optimize the performances of modern electronic systems, such as: wireless services, telecom and mobile computing. Fortunately, those design challenges can be overcome thanks to the development of Electronic Design Automation (EDA) tools. In the analog, mixed signal and radio-frequency (AMS/RF) domains, circuit optimization tools have demonstrated their usefulness in addressing design problems taking into account downscaling technological aspects. Recent advances in EDA have shown that the simulation-based sizing technique is a very interesting solution to the ‘complex’ modelling task in the circuit design optimization problem. In this paper we propose a multi-objective simulation-based optimization tool. A CMOS LC-VCO circuit is presented to show the viability of this tool. The tool is used to generate the Pareto front linking two conflicting objectives, namely the VCO Phase Noise and Power Consumption. The accuracy of the results is checked against HSPICE/RF simulations.

A novel multi-objective algorithm: application to the optimal sizing of current conveyors

This brief proposes a novel multi-objective heuristic. It is a transformation of a mono-objective heuristic into a multi-objective one by addition of an archive and some non dominance computing routines. Performances of the proposed heuristic are demonstrated thru test functions. An application to the optimal sizing of a class AB second generation CMOS current conveyor is presented. Comparison with NSGA-II is given.

Multi-objective simulation-based optimization for the optimal design of analog circuits

We present a multi-objective simulation-based optimization tool. The proposed tool can handle a large variety of analog circuits since it is able to include a large spectrum of performances. Application examples are presented to show viability of this tool. Two current mode circuits are considered, namely a conventional second generation CMOS current conveyor and a differential based current conveyor. The tool is used to generate the Pareto front linking two conflicting objectives for both circuits. Comparisons with already published works dealing with the same circuits but using the equation-based optimization approaches are given.