Anand Summanwar

3D Radiation Detectors: Charge Collection Characterisation and Applicability of Technology for Microdosimetry

A study of charge collection in SINTEF 3D active edge silicon detectors was carried out at ANSTO using Ion Beam Induced Charge (IBIC) technique. An IBIC study has shown that several different geometries of 3D detectors have full depletion under low applied bias. The effect of fast neutron and gamma radiation on their charge collection efficiency was also investigated. A 3D active edge silicon detector technology has demonstrated extremely promising performance for application of the 3D Sensitive Volumes (SVs) fabrication methods to SOI microdosimetry.

Results from the first prototype of large 3D active edge sensors

3D active edge sensors have advantages such as radiation hardness and edgeless capability. With the use of deep reactive ion etching and wafer bonding, 18.5 by 20.5 mm2 3D detectors with active edges have been successfully fabricated at SINTEF MiNaLab. These sensors are compatible with the ATLAS FE-I4 readout electronics. Fabrication process and difficulties are presented and the preliminary electrical measurements are also discussed.

TSV development for miniaturized MEMS acceleration switch

Fragile micromachined MEMS structures are usually protected by bonding a capping wafer to the device wafer itself. As opposed to using lateral interconnects at the interface between the cap wafer and the device wafer, the use of vertical through silicon vias (TSVs) significantly simplifies the mounting of the components and it also results in the smallest footprint. This paper presents the concept chosen for fabricating a miniaturized MEMS acceleration switch with TSVs through the SOI (silicon on insulator) device wafer, as well as the experimental results of the TSV process development that was done for this particular application. Especially challenging was the development of an etching process that can etch the thick buried oxide of the SOI wafer through high aspect ratio trenches.

Design, Simulation, Fabrication, and Preliminary Tests of 3D CMS Pixel Detectors for the Super-LHC

The Super-LHC upgrade puts strong demands on the radiation hardness of the innermost tracking detectors of the CMS, which cannot be fulfilled with any conventional planar detector design. The so-called 3D detector architectures, which feature columnar electrodes passing through the substrate thickness, are under investigation as a potential solution for the closest operation points to the beams, where the radiation fluence is estimated to reach 1016 neq/cm2. Two different 3D detector designs with CMS pixel readout electronics are being developed and evaluated for their advantages and drawbacks. The fabrication of full-3D active edge CMS pixel devices with p-type substrate has been successfully completed at SINTEF. In this paper, we study the expected post-irradiation behaviors of these devices with simulations and, after a brief description of their fabrication, we report the first leakage current measurement results as performed on wafer.

Dry-film resist technology for versatile TSV fabrication for MEMS, tested on blind dummy TSVs

Three-dimensional (3D) integration of MEMS and ICs enables improvements in device performance, and often requires through-silicon vias (TSVs). TSV technologies presently available for micro electromechanical systems (MEMS) either have completely filled vias or hollow vias. Hollow vias imply perforated wafers, and limit further processing options. We have investigated dry film resist which enables photolithography on perforated wafers. The investigated resist was found to have adequate adhesion to silicon, SiO2, and aluminum surfaces. Resist patterns with square openings of side length 15 μm and resist squares of side length 15 μm were reliably realized on all three investigated surfaces. On silicon surfaces, resist patterns with square openings of side length 10 μm and resist squares of side length 7 μm could be realized. The resist could withstand wet etching of 1 μm aluminum, reactive ion etching (RIE) of 7500 Å SiO2 and deep silicon etching (DRIE) of 30 μm Si. Individual process steps for the future fabrication of DRIE etched TSVs with SiO2 isolation, polysilicon conductor material and aluminum top contacts have been developed and verified.