Anders Jauhiainen

Electrical Characterization Of Bonding Interfaces

An overview is given on measurement techniques and results obtained for the characterization of bonded Si-Si, Si-SiO2 and SiO2-SiO2 interfaces. The electrical properties of Si-Si interfaces are found to be very similar to those of grain boundaries, which suggests a model where the current across the interface is limited by a potential barrier determined by charge carriers captures into electron states at the bonded interface. From current-voltage and capacitance-voltage measurements, the interface charge and its energy distribution can be determined. For bonded Si-SiO2 interfaces, energy states distributions are obtained by capacitance voltage technique with midgap densities in the region at or above 5 1010 eV-1 cm-2. Interfaces between two bonded SiO2 layers exhibit an increased concentration of electron traps

Steady-state and transient current transport in undoped polycrystalline diamond films

We have investigated steady-state and transient electrical properties of undoped polycrystalline diamond thin films deposited using hot filament chemical vapor deposition on (100)-oriented n-type and p-type silicon substrates. The capacitance-voltage characteristics are strongly influenced by slow traps located close to the interface between the diamond layer and the silicon substrate. When interpreting data one has to consider that the traps are not in thermal equilibrium during measurements. The steady-state current through the diamond film has the same behavior for films deposited on both n-Si and p-Si. Its temperature and field dependency can be interpreted in terms of Poole–Frenkel transport involving ionized sites with overlapping potentials in the diamond film. Electrically excited current transients decay with time according to a power law. The kinetics depend only weakly on temperature. Further, the transients contain very long time scales and show much similarity to earlier reported optically ex...

Characterization of Spontaneously Bonded Hydrophobic Silicon Surfaces

The choice of surface treatment prior to silicon wafer bonding is crucial both for the reliability of the bonding process and the electrical properties of the bonded structure. In the case of silicon direct bonding for manufacturing of buried electrical junctions, the bonding step is particularly critical for accurate and reproducible results. In this work, the attraction between HF-etched surfaces and the effect of a following water rinse were investigated by studying the bonding spontaneity, velocity of the initial bonding wave, and the electrical properties of the bonded junctions. Spontaneous bonding occurred when no subsequent water rinse was made after the HF-etch, while water-rinsed wafers did bond only with the help of an applied pressure and also ended up with more voids

Oxide Degradation of Wafer Bonded Metal Oxide Semiconductor Capacitors Following Fowler‐Nordheim Electron Injection

The degradation of wafer bonded silicon dioxides as a result of Fowler-Nordheim electron injection has been studied. The samples were metal oxide semiconductors (MOS) capacitors with wafer-bonded SiO 2 -SiO 2 interfaces at the oxide center. The charge trapping in the oxide and the Si-SiO 2 interface state generation were monitored as a function of injected charge and compared to reference MOS capacitors without bonded interfaces. A larger change in the oxide charge was found in the bonded capacitors as compared to the reference structures

Electrical reliability of ultra thin remote plasma deposited oxides on silicon

Abstract The degradation of ultra thin remote plasma enhanced chemical vapor deposition (RPECVD) oxides during direct tunneling electron injection was studied and compared to that of thermally grown oxides. The deposited oxides were found to detoriate during injection and to recover afterwards in the same way as thermally grown ones. Also found was that the energy loss at the interface of the injected electrons is a much better parameter than the injected current density for estimating the generated charge density.

Charge Trapping in Wafer Bonded MOS Structures

Wafer bonded MOS capacitors were investigated in order to study the electrical properties of bonded silicon dioxide layers. From CV measurements we estimated the amount of charge located at the bonded SiO<inf>2</inf>-SiO<inf>2</inf> interface to be less than about 10¹¹ elementary charges per cm². We also found that the formation of a bonded SiO<inf>2</inf>-SiO<inf>2</inf> interface did not affect the thermally grown Si-SiO<inf>2</inf> interface. Pronounced negative charging at or close to the bonded SiO<inf>2</inf>-SiO<inf>2</inf> interface was observed during Fowler-Nordheim charge injection. Reference samples, without bonded interfaces, did not exhibit the same magnitude of oxide charging.

High frequency capacitance measurements on metal–insulator–semiconductor structures in thermal non-equilibrium condition

Abstract We simulate the charge carrier traffic between the energy bands and the interface states in structures like Al/SiO2/6H–SiC, Al/diamond/Si and Al/SIPOS/Si to explain their high frequency capacitance–voltage behavior. The structures have in common that traditional electrical measurement techniques performed at room temperature are prone to thermal non-equilibrium effects. This can result in large errors in the interface data extracted from such studies when thermal equilibrium conditions are assumed. In this work, high frequency capacitance–voltage data are compared to numerical simulations which include such thermal non-equilibrium conditions to enable more accurate estimates of interface state parameters in above-mentioned structures.

Electrical Properties Of Undoped Polycrystalline Diamond Thin Films On Silicon

We have investigated the electrical properties of undoped polycrystalline diamond thin films deposited on (100)-oriented n-type and p-type silicon substrates. The films, intended for electronic applications, were manufactured using hot filament chemical vapour deposition (HFCVD). To a large extent the capacitance-voltage characteristics are influenced by traps located close to the interface between the diamond layer and the silicon substrate. These traps play an important role for voltage sharing between the diamond layer and the silicon space charge region. The DC current density through the diamond film has the same functional dependence on the electric field for films deposited on both n- and p-Si. The field dependency agrees with a Frenkel-Poole transport model. Further, although the DC current transport is thermally activated, it does not follow an Arrhenius relation. A possible reason is that traps within a broad range of energy levels are involved in the charge transport. Finally, current transients resulting from stepwise changes in the applied voltage follow a power law time dependence where the kinetics depend only weakly on temperature

Stress-Recovery Transients in Ultra Thin Oxides on Silicon

The logarithmic current transients observed after electrical stress of 2 nm thick oxides on silicon show no sign of saturation for times up to 1 Ms. These results contradict the hypothesis that the tunneling distance from oxide defects to an interface is the main source of the dispersive relaxation in our case, and this might very well extend to other cases where such relaxation is observed in MOS devices with thicker oxides.

Effect of an inhomogeneous insulating film on the capacitance of metal–insulator–semiconductor structures

The capacitance of metal–insulator–semiconductor structures with inhomogeneities in the insulating film is significantly influenced by phenomena not present in the capacitance of corresponding ideal structures. These inhomogeneities may be structural ones like a rough surface topography or compositional ones like inclusions of a different material in the film. In the case of a rough surface, three-dimensional simulations of the accumulation capacitance are compared to measurements on aluminum-polycrystalline diamond-silicon devices. The results show that the surface roughness has to be considered when interpreting the measured data. Also, neglecting the effect of the surface roughness results in erroneous values of the permittivity of the insulating film.