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Dive into the research topics where Andre P. Labonte is active.

Publication


Featured researches published by Andre P. Labonte.


bipolar/bicmos circuits and technology meeting | 2010

CBC8: A 0.25 µm SiGe-CBiCMOS technology platform on thick-film SOI for high-performance analog and RF IC design

Jeff A. Babcock; Greg Cestra; Wibo van Noort; Paul Allard; Scott Ruby; Jon Tao; Robert Malone; Alan Buchholz; Natasha Lavrovskaya; Wipawan Yindeepol; Craig Printy; Jamal Ramdani; Andre P. Labonte; Heather McCulloh; Yaojian Leng; Patrick McCarthy; Don Getchell; Akshey Sehgal; Tracey Krakowski; Saurabh Desai; Christopher C. Joyce; Peyman Hojabri; Stefaan Decoutere

A production released complementary-SiGe BiCMOS technology on SOI has been developed for high speed analog and RFIC applications. It features matched SiGe:C PNP and NPN transistors. The PNP shows cutting edge performance metrics with β·VA =17,000 and near record fT·BVCEO ≥ 195GHz·V for a 5V process while demonstrating best in class linearity on a fully differential amplifier design. A modular process flow was leveraged to enhance the Analog design needs for the platform. For higher-speed lower power, we also demonstrate a low voltage SiGe NPN with peak fT of 50 GHz at low-bias (VCE = 0.5V), ideal for load line drive. Finally, we discuss core CMOS devices which utilize a dual-gate oxide process for improved mixed-signal mixed-voltage design and better optimization of digital blocks.


Archive | 2011

SYSTEM AND METHOD FOR PROVIDING LOW VOLTAGE HIGH DENSITY MULTI-BIT STORAGE FLASH MEMORY

Jiankang Bu; Lee James Jacobson; Andre P. Labonte


Archive | 2010

SiGe Heterojunction Bipolar Transistor and Method of Forming a SiGe Heterojunction Bipolar Transistor

Wibo van Noort; Jamal Ramdani; Andre P. Labonte; Donald Robertson Getchell


Archive | 2003

Method of forming a sub-micron tip feature

Andre P. Labonte; Lee James Jacobson


Archive | 2011

Structure for decreasing minimum feature size in an integrated circuit

Andre P. Labonte; Lee James Jacobson


Archive | 2006

System and method for providing a single deposition emitter/base in a bipolar junction transistor

Jamal Ramdani; Craig Printy; Steven J. Adler; Andre P. Labonte


Archive | 2005

Method for forming a lens using sub-micron horizontal tip feature

Lee James Jacobson; Andre P. Labonte


Archive | 2007

Apparatus and method for isolating integrated circuit components using deep trench isolation and shallow trench isolation

Andre P. Labonte; Todd Thibeault


Archive | 2010

Semiconductor device having localized insulated block in bulk substrate and related method

Craig Printy; Andre P. Labonte; Jamal Ramdani


Archive | 2008

Non-volatile memory cell with asymmetrical split gate and related system and method

Andre P. Labonte; Jiankang Bu; Mark A. Rathmell

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Jiankang Bu

National Semiconductor

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Greg Cestra

National Semiconductor

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