Akshey Sehgal

Eliminating arsenic containing residue that create killer defects in 20 nm HVM

Dry oxide removal techniques are used as pre-spacer cleans to remove sidewall oxide (without undercutting the gate oxide and maintaining the gate CD (critical dimension)) in 20 nm HVM (high volume manufacturing). This results in arsenic containing residues on the wafer surface. Dry etch, although effective in accomplishing most of the desired process objectives, is not effective in removing arsenic, implanted into the oxide during the junction formation. As a result, arsenic residues are left on the wafer surface after the pre-spacer clean which then get coated by spacer nitride. Nitride-coated arsenic residues are difficult to remove and new cleans were developed to completely remove arsenic residue from the wafer surface at the pre-Spacer clean step. Defectivity reduction and electrical data are presented to show the effectiveness of these new cleans and the resultant yield increase, respectively.

Developing Integrated Solutions and Wet Cleans to Eliminate Tungsten Contact Attack in Sub 0x nm Nodes

Having successfully developed high volume manufacturing (HVM) processes for the 0x nm node, the semiconductor industry is now engaged in developing the next advanced node. This 0xnm node development is being accomplished by a combination of shrinking 0x nm dimensions, introducing new materials and films and consequently new lithography, dry etch and wet clean processes for the new node. One of the major challenges is developing processes, including BEOL Cleans Steps, to successfully and reliably expose the MOL metal contact during the first metal line formation without degrading the contact itself. One such compatible method/clean is discussed in this study.

Effect of defectivity reduction in Spacer and Junction modules on RMG defectivity

Defect elimination from the Spacers and Junctions modules has been shown to increase yield in 20 nm HVM (high volume manufacturing). However, other defects such as surface particles and lifted pattern were also found in these modules. These defects formed voids downstream and later were filled with metals in the RMG (replacement metal gate) process. Therefore, these defects also need to be eliminated in order to meet entitlement yield. These defects were traced through the line from their origination in the Spacer and Junction modules into RMG and MOL (middle of line) modules. Surface particles and lifted pattern were eliminated by developing a new photoresist stripping (PRS) process. The effectiveness of the new PRS process was verified by defect elimination in the Spacer and Junctions and in the downstream RMG module. Defectivity reduction and electrical data will be presented to show the effectiveness of this new PRS process.