Andre Szczepanek
Texas Instruments
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Publication
Featured researches published by Andre Szczepanek.
international solid-state circuits conference | 2007
Mike Harwood; Nirmal C. Warke; Richard Simpson; Tom Leslie; Ajith Amerasekera; Sean Batty; Derek Colman; Eugenia Carr; Venu Gopinathan; Steve Hubbins; Peter Hunt; Andy Joy; Pulkit Khandelwal; Bob Killips; Thomas Krause; Shaun Lytollis; Andrew Pickering; Mark Saxton; David Sebastio; Graeme Swanson; Andre Szczepanek; Terry Ward; Jeff Williams; Richard Williams; Tom Willwerth
A DSP-based low-power 12.5Gb/s SerDes using a baud-rate ADC and a digital data-path is developed for backplane data communication. A digital 2-tap FFE and a 5-tap DFE in the RX provide channel compensation. A BER of <10-15 is measured over legacy backplanes with 24dB loss at Nyquist. The power consumption and die area are 330mW and 0.45mm2 per TX/RX pair
international solid-state circuits conference | 1985
Andre Szczepanek; B. Shore; S. Hubbins; C. Hull; A. Smith; H. Watters; M. McGregor; R. Meads
A 2.4μ NMOS single chip LAN ring controller and buffer manager will be discussed. A 16Mb/s 102K square mil device provides please locking to incoming differential Manchester coded data and includes a 144Kb ROM.
Archive | 2002
Andre Szczepanek; Denis R. Beaudoin
Archive | 1994
Andre Szczepanek
Archive | 1982
Stephen J. Hubbins; David G. England; Andre Szczepanek; David Norvall
Archive | 1994
Andre Szczepanek
Archive | 1994
Andre Szczepanek; Denis R. Beaudoin
Archive | 1990
Andre Szczepanek
Archive | 1993
Andre Szczepanek
Archive | 1999
Andre Szczepanek; Denis R. Beaudoin; Iain Robertson
